[PATCH] D90145: [TargetLowering] Add i1 condition for bit comparison fold

[Sven van Haastregt via Phabricator via llvm-commits]

This revision was landed with ongoing or failed builds.
This revision was automatically updated to reflect the committed changes.
Closed by commit rG5d0308009284: [TargetLowering] Add i1 condition for bit comparison fold (authored by svenvh).

Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D90145/new/

https://reviews.llvm.org/D90145

Files:
  llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
  llvm/test/CodeGen/NVPTX/pow2_mask_cmp.ll


Index: llvm/test/CodeGen/NVPTX/pow2_mask_cmp.ll
===================================================================
--- llvm/test/CodeGen/NVPTX/pow2_mask_cmp.ll
+++ llvm/test/CodeGen/NVPTX/pow2_mask_cmp.ll
@@ -3,14 +3,14 @@
 ; Tests the following pattern:
 ; (X & 8) != 0 --> (X & 8) >> 3
 
-; This produces incorrect code when boolean false is represented
-; as a negative one, and this test checks that the transform is
-; not triggered.
+; This produces incorrect code in general when boolean false is
+; represented as a negative one. There is however a special
+; case when the type has a bitsize of 1, for which the false
+; value will be identical regardless of the boolean representation.
+; Check that the optimization triggers in this case.
 
 ; CHECK-LABEL: @pow2_mask_cmp
-; CHECK: and.b32 [[AND:%r[0-9]+]], %r{{[0-9]+}}, 8
-; CHECK: setp.ne.s32 [[SETP:%p[0-9+]]], [[AND]], 0
-; CHECK: selp.u32 %r{{[0-9]+}}, 1, 0, [[SETP]]
+; CHECK: bfe.u32 {{%r[0-9]+}}, {{%r[0-9]+}}, 3, 1
 define i32 @pow2_mask_cmp(i32 %x) {
   %a = and i32 %x, 8
   %cmp = icmp ne i32 %a, 0
Index: llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
===================================================================
--- llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
+++ llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
@@ -3980,8 +3980,12 @@
     const APInt &C1 = N1C->getAPIntValue();
     EVT ShValTy = N0.getValueType();
 
-    // Fold bit comparisons when we can.
-    if (getBooleanContents(N0.getValueType()) == ZeroOrOneBooleanContent &&
+    // Fold bit comparisons when we can. This will result in an
+    // incorrect value when boolean false is negative one, unless
+    // the bitsize is 1 in which case the false value is the same
+    // in practice regardless of the representation.
+    if ((VT.getSizeInBits() == 1 ||
+         getBooleanContents(N0.getValueType()) == ZeroOrOneBooleanContent) &&
         (Cond == ISD::SETEQ || Cond == ISD::SETNE) &&
         (VT == ShValTy || (isTypeLegal(VT) && VT.bitsLE(ShValTy))) &&
         N0.getOpcode() == ISD::AND) {


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