[PATCH] D90145: [TargetLowering] Add i1 condition for bit comparison fold

[Sanjay Patel via Phabricator via llvm-commits]

spatel accepted this revision.
spatel added a comment.
This revision is now accepted and ready to land.

LGTM


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D90145/new/

https://reviews.llvm.org/D90145