[PATCH] D89382: [SVE][CodeGen] Lower scalable integer vector reductions

[Kerry McLaughlin via Phabricator via llvm-commits]

kmclaughlin updated this revision to Diff 300735.
kmclaughlin marked 3 inline comments as done.
kmclaughlin added a comment.

- Changed fix for the warning in computeKnownBits for extract_vector_elt to match D87651 <https://reviews.llvm.org/D87651>
- Moved check for i1 types in LowerVECREDUCE outside of the switch statement


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D89382/new/

https://reviews.llvm.org/D89382

Files:
  llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
  llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
  llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
  llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
  llvm/lib/Target/AArch64/AArch64ISelLowering.h
  llvm/test/CodeGen/AArch64/sve-int-pred-reduce.ll
  llvm/test/CodeGen/AArch64/sve-int-reduce.ll
  llvm/test/CodeGen/AArch64/sve-split-int-pred-reduce.ll
  llvm/test/CodeGen/AArch64/sve-split-int-reduce.ll
  llvm/test/CodeGen/AArch64/vecreduce-umax-legalization.ll

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