[PATCH] D90051: AMDGPU/GlobalISel: Add floating point med3 combine for IEEE=false

[Petar Avramovic via Phabricator via llvm-commits]

Petar.Avramovic added inline comments.


================
Comment at: llvm/lib/Target/AMDGPU/AMDGPUPostLegalizerCombiner.cpp:174-175
+
+    // TODO: Add G_FMINNUM_IEEE (requires some additional checks for possible
+    // SNaN input).
+    if (OpcodeTriple.Min == AMDGPU::G_FMINNUM) {
----------------
arsenm wrote:
> Might as well handle this now
I am not really sure I know correct way to do it. Also this combine heavily depends on legalizer and primarily completing remaining of SNaN checks in isKnownNeverSNaN.


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D90051/new/

https://reviews.llvm.org/D90051