[PATCH] D90045: [ARM][SchedModels] Convert IsLdrAm3NegRegOffPred to MCSchedPredicate

Andrea Di Biagio via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Fri Oct 23 08:23:23 PDT 2020

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andreadb added a comment.

Nice!
The predicates look good to me.

As always, please wait for the final LGTM from @dmgreen (or other people tthat know how to validate the lat/throughput/resource numbers).


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