[PATCH] D90029: [ARM][SchedModels] Convert IsLdstsoMinusRegPred to MCSchedPredicate

Eugene Leviant via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Fri Oct 23 06:32:16 PDT 2020


evgeny777 updated this revision to Diff 300267.
evgeny777 added a comment.

Simplified


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D90029/new/

https://reviews.llvm.org/D90029

Files:
  llvm/lib/Target/ARM/ARMBaseInstrInfo.cpp
  llvm/lib/Target/ARM/ARMBaseInstrInfo.h
  llvm/lib/Target/ARM/ARMSchedule.td
  llvm/lib/Target/ARM/ARMScheduleA57.td
  llvm/test/tools/llvm-mca/ARM/cortex-a57-memory-instructions.s

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