[llvm] 6756d43 - [SystemZ] Bugfix in SystemZVectorConstantInfo

Jonas Paulsson via llvm-commits llvm-commits at lists.llvm.org
Wed Oct 14 06:37:23 PDT 2020


Author: Jonas Paulsson
Date: 2020-10-14T15:34:40+02:00
New Revision: 6756d43af97ea39722af14504b286e302955c6b5

URL: https://github.com/llvm/llvm-project/commit/6756d43af97ea39722af14504b286e302955c6b5
DIFF: https://github.com/llvm/llvm-project/commit/6756d43af97ea39722af14504b286e302955c6b5.diff

LOG: [SystemZ] Bugfix in SystemZVectorConstantInfo

In order to correctly load an all-ones FP NaN value into a floating point
register with a VGBM, the analyzed 32/64 FP bits must first be shifted left
(into element 0 of the vector register).

SystemZVectorConstantInfo has so far relied on element replication which has
bypassed the need to do this shift, but now it is clear that this must be
done in order to handle NaNs.

Review: Ulrich Weigand

Differential Revision: https://reviews.llvm.org/D89389

Added: 
    

Modified: 
    llvm/lib/Target/SystemZ/SystemZISelLowering.cpp
    llvm/test/CodeGen/SystemZ/fp-const-12.ll
    llvm/test/CodeGen/SystemZ/vector-constrained-fp-intrinsics.ll

Removed: 
    


################################################################################
diff  --git a/llvm/lib/Target/SystemZ/SystemZISelLowering.cpp b/llvm/lib/Target/SystemZ/SystemZISelLowering.cpp
index 9f1805879e7c..27fdf39fdfcd 100644
--- a/llvm/lib/Target/SystemZ/SystemZISelLowering.cpp
+++ b/llvm/lib/Target/SystemZ/SystemZISelLowering.cpp
@@ -784,10 +784,11 @@ bool SystemZVectorConstantInfo::isVectorConstantLegal(
 SystemZVectorConstantInfo::SystemZVectorConstantInfo(APFloat FPImm) {
   IntBits = FPImm.bitcastToAPInt().zextOrSelf(128);
   isFP128 = (&FPImm.getSemantics() == &APFloat::IEEEquad());
-
-  // Find the smallest splat.
   SplatBits = FPImm.bitcastToAPInt();
   unsigned Width = SplatBits.getBitWidth();
+  IntBits <<= (SystemZ::VectorBits - Width);
+
+  // Find the smallest splat.
   while (Width > 8) {
     unsigned HalfSize = Width / 2;
     APInt HighValue = SplatBits.lshr(HalfSize).trunc(HalfSize);

diff  --git a/llvm/test/CodeGen/SystemZ/fp-const-12.ll b/llvm/test/CodeGen/SystemZ/fp-const-12.ll
index f22156ba40e8..89a396423d3e 100644
--- a/llvm/test/CodeGen/SystemZ/fp-const-12.ll
+++ b/llvm/test/CodeGen/SystemZ/fp-const-12.ll
@@ -1,4 +1,4 @@
-; Test loads of FP constants with VGM.
+; Test loads of FP constants with VGM and VGBM.
 ;
 ; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z13 | FileCheck %s
 
@@ -61,3 +61,15 @@ define float @f10() {
 ; CHECK: vgmf %v0, 2, 6
   ret float 0.125
 }
+
+define float @f11() {
+; CHECK-LABEL: f11:
+; CHECK: vgbm %v0, 61440
+  ret float 0xFFFFFFFFE0000000
+}
+
+define double @f12() {
+; CHECK-LABEL: f12:
+; CHECK: vgbm %v0, 61440
+  ret double 0xFFFFFFFF00000000
+}

diff  --git a/llvm/test/CodeGen/SystemZ/vector-constrained-fp-intrinsics.ll b/llvm/test/CodeGen/SystemZ/vector-constrained-fp-intrinsics.ll
index b7cbac89db31..8752e6b85eb4 100644
--- a/llvm/test/CodeGen/SystemZ/vector-constrained-fp-intrinsics.ll
+++ b/llvm/test/CodeGen/SystemZ/vector-constrained-fp-intrinsics.ll
@@ -802,7 +802,7 @@ define <3 x float> @constrained_vector_fadd_v3f32() #0 {
 ;
 ; SZ13-LABEL: constrained_vector_fadd_v3f32:
 ; SZ13:       # %bb.0: # %entry
-; SZ13-NEXT:    vgbm %v0, 15
+; SZ13-NEXT:    vgbm %v0, 61440
 ; SZ13-NEXT:    vgmf %v2, 1, 1
 ; SZ13-NEXT:    vgmf %v3, 2, 8
 ; SZ13-NEXT:    lzer %f1
@@ -974,12 +974,12 @@ define <3 x float> @constrained_vector_fsub_v3f32() #0 {
 ;
 ; SZ13-LABEL: constrained_vector_fsub_v3f32:
 ; SZ13:       # %bb.0: # %entry
-; SZ13-NEXT:    vgbm %v2, 15
+; SZ13-NEXT:    vgbm %v2, 61440
 ; SZ13-NEXT:    lzer %f1
 ; SZ13-NEXT:    sebr %f2, %f1
 ; SZ13-NEXT:    vgmf %v1, 1, 1
-; SZ13-NEXT:    vgbm %v3, 15
-; SZ13-NEXT:    vgbm %v0, 15
+; SZ13-NEXT:    vgbm %v3, 61440
+; SZ13-NEXT:    vgbm %v0, 61440
 ; SZ13-NEXT:    sebr %f3, %f1
 ; SZ13-NEXT:    vgmf %v1, 2, 8
 ; SZ13-NEXT:    sebr %f0, %f1


        


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