[PATCH] D89217: [AMDGPU] Base getSubRegFromChannel on TableGen data

Carl Ritson via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Tue Oct 13 18:44:25 PDT 2020


critson updated this revision to Diff 298008.
critson marked 4 inline comments as done.
critson added a comment.

- Use std::array and tidy up initialisation.
- Fix number of rows in table.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D89217/new/

https://reviews.llvm.org/D89217

Files:
  llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp
  llvm/lib/Target/AMDGPU/SIRegisterInfo.h

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