[PATCH] D89217: [AMDGPU] Base getSubRegFromChannel on TableGen data
Jay Foad via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Tue Oct 13 09:09:01 PDT 2020
foad added inline comments.
================
Comment at: llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp:92-93
+ static auto InitializeSubRegFromChannelTableOnce = [this]() {
+ for (unsigned Width = 0; Width < array_lengthof(SubRegFromChannelTable);
+ ++Width)
+ for (unsigned Offset = 0;
----------------
If you use std::array you can iterate over them with range-based for loops, instead of using array_lengthof.
================
Comment at: llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp:45
+
+static const uint16_t SubRegFromChannelTableWidthMap[17] = {
+ 0, 1, 2, 3, 4, 5, 6, 7, 8, 0, 0, 0, 0, 0, 0, 0, 9};
----------------
critson wrote:
> rampitec wrote:
> > This could use a comment.
> Added a detailed comment.
It doesn't explain what the 9 means. 9-1 is not a valid index into SubRegFromChannelTable. Also you have a double full stop at the end.
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D89217/new/
https://reviews.llvm.org/D89217
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