[PATCH] D89114: [TableGen][SchedModels] Fix aliasing of SchedWriteVariant
Eugene Leviant via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Fri Oct 9 07:49:22 PDT 2020
evgeny777 updated this revision to Diff 297236.
evgeny777 added a comment.
Herald added a subscriber: gbedwell.
Patch also fixes Cortex-A57 model for sxth/uxth/sxtab/uxtab instruction family. Added test case.
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D89114/new/
https://reviews.llvm.org/D89114
Files:
llvm/test/TableGen/sched-aliases.td
llvm/test/tools/llvm-mca/ARM/A57-basic-instructions.s
llvm/utils/TableGen/CodeGenSchedule.cpp
llvm/utils/TableGen/CodeGenSchedule.h
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