[PATCH] D88759: [RISCV] Add SiFive cores to the CPU option

Kuan Hsu Chen (Zakk) via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Sun Oct 4 19:20:27 PDT 2020

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khchen accepted this revision.
khchen added a comment.
This revision is now accepted and ready to land.

LGTM.


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  https://reviews.llvm.org/D88759/new/

https://reviews.llvm.org/D88759

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