[PATCH] D88642: [AArch64] Match the windows canonical callee saved register order [alternative implementation]

[Martin Storsjö via Phabricator via llvm-commits]

mstorsjo added a comment.

The mismatch with generated stack objects can be observed in the new wineh-frame-scavenge.mir testcase. The full output of the tested command contains this:

  - { id: 0, name: '', type: default, offset: -4, size: 4, alignment: 4, 
      stack-id: default, callee-saved-register: '', callee-saved-restored: true, 
      local-offset: -4, debug-info-variable: '', debug-info-expression: '', 
      debug-info-location: '' }
  - { id: 1, name: '', type: spill-slot, offset: -16, size: 8, alignment: 16, 
      stack-id: default, callee-saved-register: '$x19', callee-saved-restored: true, 
      debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
  - { id: 2, name: '', type: spill-slot, offset: -24, size: 8, alignment: 8, 
      stack-id: default, callee-saved-register: '$x20', callee-saved-restored: true, 
      debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
  - { id: 3, name: '', type: spill-slot, offset: -32, size: 8, alignment: 8, 
      stack-id: default, callee-saved-register: '$x21', callee-saved-restored: true, 
      debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
  - { id: 4, name: '', type: spill-slot, offset: -40, size: 8, alignment: 8, 
      stack-id: default, callee-saved-register: '$x22', callee-saved-restored: true, 
      debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
  - { id: 5, name: '', type: spill-slot, offset: -48, size: 8, alignment: 8, 
      stack-id: default, callee-saved-register: '$x23', callee-saved-restored: true, 
      debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }

While the actual generated prolog looks like this:

  early-clobber $sp = frame-setup STPXpre killed $x19, killed $x20, $sp, -6 :: (store 8 into %stack.4), (store 8 into %stack.5) 
  frame-setup SEH_SaveRegP_X 19, 20, -48
  frame-setup STPXi killed $x21, killed $x22, $sp, 2 :: (store 8 into %stack.2), (store 8 into %stack.3)
  frame-setup SEH_SaveRegP 21, 22, 16
  frame-setup STRXui killed $x23, $sp, 4 :: (store 8 into %stack.1)
  frame-setup SEH_SaveReg 23, 32
  frame-setup SEH_PrologEnd

or more readably in the final assembly form like this:

  	stp	x19, x20, [sp, #-48]!           ; 16-byte Folded Spill
  	.seh_save_regp_x x19, 48
  	stp	x21, x22, [sp, #16]             ; 16-byte Folded Spill
  	.seh_save_regp x21, 16
  	str	x23, [sp, #32]                  ; 8-byte Folded Spill
  	.seh_save_reg x23, 32
  	.seh_endprologue

Note how the MIR seems to think that x23 is saved at stack offset -48, while in reality, x19 is saved there.


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https://reviews.llvm.org/D88642