[PATCH] D88541: [AArch64] Don't merge sp decrement into later stores when using WinCFI
Martin Storsjö via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Thu Oct 1 01:36:51 PDT 2020
mstorsjo updated this revision to Diff 295489.
mstorsjo edited the summary of this revision.
mstorsjo added a comment.
Factorize out a helper function `needsWinCFI`, to reduce the amount of duplicated code a little bit.
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D88541/new/
https://reviews.llvm.org/D88541
Files:
llvm/lib/Target/AArch64/AArch64LoadStoreOptimizer.cpp
llvm/test/CodeGen/AArch64/arm64-windows-calls.ll
Index: llvm/test/CodeGen/AArch64/arm64-windows-calls.ll
===================================================================
--- llvm/test/CodeGen/AArch64/arm64-windows-calls.ll
+++ llvm/test/CodeGen/AArch64/arm64-windows-calls.ll
@@ -26,7 +26,10 @@
entry:
; FIXME: Missed optimization, the entire SP push/pop could be removed
; CHECK-LABEL: f2
-; CHECK: stp xzr, xzr, [sp, #-16]!
+; CHECK: sub sp, sp, #16
+; CHECK-NEXT: .seh_stackalloc 16
+; CHECK-NEXT: .seh_endprologue
+; CHECK-NEXT: stp xzr, xzr, [sp]
; CHECK-NEXT: mov x0, xzr
; CHECK-NEXT: mov x1, xzr
; CHECK-NEXT: .seh_startepilogue
Index: llvm/lib/Target/AArch64/AArch64LoadStoreOptimizer.cpp
===================================================================
--- llvm/lib/Target/AArch64/AArch64LoadStoreOptimizer.cpp
+++ llvm/lib/Target/AArch64/AArch64LoadStoreOptimizer.cpp
@@ -1754,6 +1754,11 @@
return false;
}
+static bool needsWinCFI(const MachineFunction *MF) {
+ return MF->getTarget().getMCAsmInfo()->usesWindowsCFI() &&
+ MF->getFunction().needsUnwindTableEntry();
+}
+
MachineBasicBlock::iterator AArch64LoadStoreOpt::findMatchingUpdateInsnForward(
MachineBasicBlock::iterator I, int UnscaledOffset, unsigned Limit) {
MachineBasicBlock::iterator E = I->getParent()->end();
@@ -1794,14 +1799,11 @@
// the memory access (I) and the increment (MBBI) can access the memory
// region defined by [SP, MBBI].
const bool BaseRegSP = BaseReg == AArch64::SP;
- if (BaseRegSP) {
+ if (BaseRegSP && needsWinCFI(I->getMF())) {
// FIXME: For now, we always block the optimization over SP in windows
// targets as it requires to adjust the unwind/debug info, messing up
// the unwind info can actually cause a miscompile.
- const MCAsmInfo *MAI = I->getMF()->getTarget().getMCAsmInfo();
- if (MAI->usesWindowsCFI() &&
- I->getMF()->getFunction().needsUnwindTableEntry())
- return E;
+ return E;
}
for (unsigned Count = 0; MBBI != E && Count < Limit;
@@ -1857,6 +1859,14 @@
}
}
+ const bool BaseRegSP = BaseReg == AArch64::SP;
+ if (BaseRegSP && needsWinCFI(I->getMF())) {
+ // FIXME: For now, we always block the optimization over SP in windows
+ // targets as it requires to adjust the unwind/debug info, messing up
+ // the unwind info can actually cause a miscompile.
+ return E;
+ }
+
// Track which register units have been modified and used between the first
// insn (inclusive) and the second insn.
ModifiedRegUnits.clear();
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