[PATCH] D76570: [AArch64] Homogeneous Prolog and Epilog for Size Optimization

[Eli Friedman via Phabricator via llvm-commits]

efriedma added a comment.

Have you looked at the RISCV prologue/epilogue lowering support?  How does this compare?



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Comment at: llvm/lib/Target/AArch64/AArch64FrameLowering.cpp:240
+  if (Exit && getArgumentPopSize(MF, *Exit))
+    return false;
+  return true;
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A long list of random conditions like this is asking for trouble: someone is inevitably going to miss some case where it needs to be updated in the future.  Is this really the only way?


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Comment at: llvm/test/CodeGen/AArch64/arm64-homogeneous-prolog-epilog-frame-tail.ll:71
+; CHECK-SAVELR:      mov     x16, x30
+; CHECK-SAVELR-NEXT: ldp     x29, x30, [sp], #16
+; CHECK-SAVELR-NEXT: stp     x20, x19, [sp, #-16]!
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If we're going to save fp/lr in the caller, can't we just save them to the correct position, instead of copying them to a new location in the outlined function?

Also, in general, pre-increment instructions are more expensive then non-pre-increment instructions.  It would be better to rearrange the operations so you can emit exactly one pre-increment instruction, instead of making every instruction pre-increment.


Repository:
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  https://reviews.llvm.org/D76570/new/

https://reviews.llvm.org/D76570