[PATCH] D88256: [NFC][regalloc] Separate iteration from AllocationOrder

Mircea Trofin via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Thu Sep 24 12:55:07 PDT 2020


mtrofin created this revision.
mtrofin added a reviewer: wmi.
Herald added subscribers: llvm-commits, hiraditya, qcolombet, MatzeB.
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This separates the two concerns - encapsulation of traversal order; and
iteration. As a deviation from the original design, setting a limit to
the number of Order registers is done upfront - this is the way the API
was used previously anyway, albeit it would have allowed changing the
limit at each call to next(). That's unnecessary complexity.


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D88256

Files:
  llvm/lib/CodeGen/AllocationOrder.cpp
  llvm/lib/CodeGen/AllocationOrder.h
  llvm/lib/CodeGen/RegAllocBasic.cpp
  llvm/lib/CodeGen/RegAllocGreedy.cpp

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