[PATCH] D87796: [SVE][WIP] Lower fixed length VECREDUCE_ADD to Scalable

[Paul Walker via Phabricator via llvm-commits]

paulwalker-arm accepted this revision.
paulwalker-arm added inline comments.
This revision is now accepted and ready to land.


================
Comment at: llvm/lib/Target/AArch64/AArch64ISelLowering.h:927
   SDValue LowerFixedLengthVectorLoadToSVE(SDValue Op, SelectionDAG &DAG) const;
+  SDValue LowerFixedLengthReductionToSVE(unsigned Op, SDValue ScalarOp,
+                                         SelectionDAG &DAG) const;
----------------
Opcode


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D87796/new/

https://reviews.llvm.org/D87796