[llvm] 5e6baf7 - [X86] Invert the compares in inline-asm-flag-output.ll so that the setcc instruction condition matches the test name. NFC
Craig Topper via llvm-commits
llvm-commits at lists.llvm.org
Fri Sep 18 21:53:53 PDT 2020
Author: Craig Topper
Date: 2020-09-18T21:23:53-07:00
New Revision: 5e6baf78e5f334585ec998e10b9d992db6994d40
URL: https://github.com/llvm/llvm-project/commit/5e6baf78e5f334585ec998e10b9d992db6994d40
DIFF: https://github.com/llvm/llvm-project/commit/5e6baf78e5f334585ec998e10b9d992db6994d40.diff
LOG: [X86] Invert the compares in inline-asm-flag-output.ll so that the setcc instruction condition matches the test name. NFC
Also add nounwind to the tests to remove cfi directives.
Added:
Modified:
llvm/test/CodeGen/X86/inline-asm-flag-output.ll
Removed:
################################################################################
diff --git a/llvm/test/CodeGen/X86/inline-asm-flag-output.ll b/llvm/test/CodeGen/X86/inline-asm-flag-output.ll
index 1912f24b7fec..af7a437d5965 100644
--- a/llvm/test/CodeGen/X86/inline-asm-flag-output.ll
+++ b/llvm/test/CodeGen/X86/inline-asm-flag-output.ll
@@ -2,12 +2,10 @@
; RUN: llc < %s -mtriple=i686-- -no-integrated-as | FileCheck %s -check-prefix=X32
; RUN: llc < %s -mtriple=x86_64-- -no-integrated-as | FileCheck %s -check-prefix=X64
-define i32 @test_cca(i64 %nr, i64* %addr) {
+define i32 @test_cca(i64 %nr, i64* %addr) nounwind {
; X32-LABEL: test_cca:
; X32: # %bb.0: # %entry
; X32-NEXT: pushl %esi
-; X32-NEXT: .cfi_def_cfa_offset 8
-; X32-NEXT: .cfi_offset %esi, -8
; X32-NEXT: movl {{[0-9]+}}(%esp), %ecx
; X32-NEXT: movl {{[0-9]+}}(%esp), %edx
; X32-NEXT: movl {{[0-9]+}}(%esp), %esi
@@ -15,9 +13,8 @@ define i32 @test_cca(i64 %nr, i64* %addr) {
; X32-NEXT: #APP
; X32-NEXT: cmp %ecx,(%esi)
; X32-NEXT: #NO_APP
-; X32-NEXT: setbe %al
+; X32-NEXT: seta %al
; X32-NEXT: popl %esi
-; X32-NEXT: .cfi_def_cfa_offset 4
; X32-NEXT: retl
;
; X64-LABEL: test_cca:
@@ -26,22 +23,20 @@ define i32 @test_cca(i64 %nr, i64* %addr) {
; X64-NEXT: #APP
; X64-NEXT: cmp %rdi,(%rsi)
; X64-NEXT: #NO_APP
-; X64-NEXT: setbe %al
+; X64-NEXT: seta %al
; X64-NEXT: retq
entry:
%cc = tail call i32 asm "cmp $2,$1", "={@cca},=*m,r,~{cc},~{dirflag},~{fpsr},~{flags}"(i64* %addr, i64 %nr) nounwind
- %tobool = icmp eq i32 %cc, 0
+ %tobool = icmp ne i32 %cc, 0
%rv = zext i1 %tobool to i32
ret i32 %rv
}
-define i32 @test_ccae(i64 %nr, i64* %addr) {
+define i32 @test_ccae(i64 %nr, i64* %addr) nounwind {
; X32-LABEL: test_ccae:
; X32: # %bb.0: # %entry
; X32-NEXT: pushl %esi
-; X32-NEXT: .cfi_def_cfa_offset 8
-; X32-NEXT: .cfi_offset %esi, -8
; X32-NEXT: movl {{[0-9]+}}(%esp), %ecx
; X32-NEXT: movl {{[0-9]+}}(%esp), %edx
; X32-NEXT: movl {{[0-9]+}}(%esp), %esi
@@ -49,9 +44,8 @@ define i32 @test_ccae(i64 %nr, i64* %addr) {
; X32-NEXT: #APP
; X32-NEXT: cmp %ecx,(%esi)
; X32-NEXT: #NO_APP
-; X32-NEXT: setb %al
+; X32-NEXT: setae %al
; X32-NEXT: popl %esi
-; X32-NEXT: .cfi_def_cfa_offset 4
; X32-NEXT: retl
;
; X64-LABEL: test_ccae:
@@ -60,22 +54,20 @@ define i32 @test_ccae(i64 %nr, i64* %addr) {
; X64-NEXT: #APP
; X64-NEXT: cmp %rdi,(%rsi)
; X64-NEXT: #NO_APP
-; X64-NEXT: setb %al
+; X64-NEXT: setae %al
; X64-NEXT: retq
entry:
%cc = tail call i32 asm "cmp $2,$1", "={@ccae},=*m,r,~{cc},~{dirflag},~{fpsr},~{flags}"(i64* %addr, i64 %nr) nounwind
- %tobool = icmp eq i32 %cc, 0
+ %tobool = icmp ne i32 %cc, 0
%rv = zext i1 %tobool to i32
ret i32 %rv
}
-define i32 @test_ccb(i64 %nr, i64* %addr) {
+define i32 @test_ccb(i64 %nr, i64* %addr) nounwind {
; X32-LABEL: test_ccb:
; X32: # %bb.0: # %entry
; X32-NEXT: pushl %esi
-; X32-NEXT: .cfi_def_cfa_offset 8
-; X32-NEXT: .cfi_offset %esi, -8
; X32-NEXT: movl {{[0-9]+}}(%esp), %ecx
; X32-NEXT: movl {{[0-9]+}}(%esp), %edx
; X32-NEXT: movl {{[0-9]+}}(%esp), %esi
@@ -83,9 +75,8 @@ define i32 @test_ccb(i64 %nr, i64* %addr) {
; X32-NEXT: #APP
; X32-NEXT: cmp %ecx,(%esi)
; X32-NEXT: #NO_APP
-; X32-NEXT: setae %al
+; X32-NEXT: setb %al
; X32-NEXT: popl %esi
-; X32-NEXT: .cfi_def_cfa_offset 4
; X32-NEXT: retl
;
; X64-LABEL: test_ccb:
@@ -94,22 +85,20 @@ define i32 @test_ccb(i64 %nr, i64* %addr) {
; X64-NEXT: #APP
; X64-NEXT: cmp %rdi,(%rsi)
; X64-NEXT: #NO_APP
-; X64-NEXT: setae %al
+; X64-NEXT: setb %al
; X64-NEXT: retq
entry:
%cc = tail call i32 asm "cmp $2,$1", "={@ccb},=*m,r,~{cc},~{dirflag},~{fpsr},~{flags}"(i64* %addr, i64 %nr) nounwind
- %tobool = icmp eq i32 %cc, 0
+ %tobool = icmp ne i32 %cc, 0
%rv = zext i1 %tobool to i32
ret i32 %rv
}
-define i32 @test_ccbe(i64 %nr, i64* %addr) {
+define i32 @test_ccbe(i64 %nr, i64* %addr) nounwind {
; X32-LABEL: test_ccbe:
; X32: # %bb.0: # %entry
; X32-NEXT: pushl %esi
-; X32-NEXT: .cfi_def_cfa_offset 8
-; X32-NEXT: .cfi_offset %esi, -8
; X32-NEXT: movl {{[0-9]+}}(%esp), %ecx
; X32-NEXT: movl {{[0-9]+}}(%esp), %edx
; X32-NEXT: movl {{[0-9]+}}(%esp), %esi
@@ -117,9 +106,8 @@ define i32 @test_ccbe(i64 %nr, i64* %addr) {
; X32-NEXT: #APP
; X32-NEXT: cmp %ecx,(%esi)
; X32-NEXT: #NO_APP
-; X32-NEXT: seta %al
+; X32-NEXT: setbe %al
; X32-NEXT: popl %esi
-; X32-NEXT: .cfi_def_cfa_offset 4
; X32-NEXT: retl
;
; X64-LABEL: test_ccbe:
@@ -128,22 +116,20 @@ define i32 @test_ccbe(i64 %nr, i64* %addr) {
; X64-NEXT: #APP
; X64-NEXT: cmp %rdi,(%rsi)
; X64-NEXT: #NO_APP
-; X64-NEXT: seta %al
+; X64-NEXT: setbe %al
; X64-NEXT: retq
entry:
%cc = tail call i32 asm "cmp $2,$1", "={@ccbe},=*m,r,~{cc},~{dirflag},~{fpsr},~{flags}"(i64* %addr, i64 %nr) nounwind
- %tobool = icmp eq i32 %cc, 0
+ %tobool = icmp ne i32 %cc, 0
%rv = zext i1 %tobool to i32
ret i32 %rv
}
-define i32 @test_ccc(i64 %nr, i64* %addr) {
+define i32 @test_ccc(i64 %nr, i64* %addr) nounwind {
; X32-LABEL: test_ccc:
; X32: # %bb.0: # %entry
; X32-NEXT: pushl %esi
-; X32-NEXT: .cfi_def_cfa_offset 8
-; X32-NEXT: .cfi_offset %esi, -8
; X32-NEXT: movl {{[0-9]+}}(%esp), %ecx
; X32-NEXT: movl {{[0-9]+}}(%esp), %edx
; X32-NEXT: movl {{[0-9]+}}(%esp), %esi
@@ -151,9 +137,8 @@ define i32 @test_ccc(i64 %nr, i64* %addr) {
; X32-NEXT: #APP
; X32-NEXT: cmp %ecx,(%esi)
; X32-NEXT: #NO_APP
-; X32-NEXT: setae %al
+; X32-NEXT: setb %al
; X32-NEXT: popl %esi
-; X32-NEXT: .cfi_def_cfa_offset 4
; X32-NEXT: retl
;
; X64-LABEL: test_ccc:
@@ -162,22 +147,20 @@ define i32 @test_ccc(i64 %nr, i64* %addr) {
; X64-NEXT: #APP
; X64-NEXT: cmp %rdi,(%rsi)
; X64-NEXT: #NO_APP
-; X64-NEXT: setae %al
+; X64-NEXT: setb %al
; X64-NEXT: retq
entry:
%cc = tail call i32 asm "cmp $2,$1", "={@ccc},=*m,r,~{cc},~{dirflag},~{fpsr},~{flags}"(i64* %addr, i64 %nr) nounwind
- %tobool = icmp eq i32 %cc, 0
+ %tobool = icmp ne i32 %cc, 0
%rv = zext i1 %tobool to i32
ret i32 %rv
}
-define i32 @test_cce(i64 %nr, i64* %addr) {
+define i32 @test_cce(i64 %nr, i64* %addr) nounwind {
; X32-LABEL: test_cce:
; X32: # %bb.0: # %entry
; X32-NEXT: pushl %esi
-; X32-NEXT: .cfi_def_cfa_offset 8
-; X32-NEXT: .cfi_offset %esi, -8
; X32-NEXT: movl {{[0-9]+}}(%esp), %ecx
; X32-NEXT: movl {{[0-9]+}}(%esp), %edx
; X32-NEXT: movl {{[0-9]+}}(%esp), %esi
@@ -185,9 +168,8 @@ define i32 @test_cce(i64 %nr, i64* %addr) {
; X32-NEXT: #APP
; X32-NEXT: cmp %ecx,(%esi)
; X32-NEXT: #NO_APP
-; X32-NEXT: setne %al
+; X32-NEXT: sete %al
; X32-NEXT: popl %esi
-; X32-NEXT: .cfi_def_cfa_offset 4
; X32-NEXT: retl
;
; X64-LABEL: test_cce:
@@ -196,22 +178,20 @@ define i32 @test_cce(i64 %nr, i64* %addr) {
; X64-NEXT: #APP
; X64-NEXT: cmp %rdi,(%rsi)
; X64-NEXT: #NO_APP
-; X64-NEXT: setne %al
+; X64-NEXT: sete %al
; X64-NEXT: retq
entry:
%cc = tail call i32 asm "cmp $2,$1", "={@cce},=*m,r,~{cc},~{dirflag},~{fpsr},~{flags}"(i64* %addr, i64 %nr) nounwind
- %tobool = icmp eq i32 %cc, 0
+ %tobool = icmp ne i32 %cc, 0
%rv = zext i1 %tobool to i32
ret i32 %rv
}
-define i32 @test_ccz(i64 %nr, i64* %addr) {
+define i32 @test_ccz(i64 %nr, i64* %addr) nounwind {
; X32-LABEL: test_ccz:
; X32: # %bb.0: # %entry
; X32-NEXT: pushl %esi
-; X32-NEXT: .cfi_def_cfa_offset 8
-; X32-NEXT: .cfi_offset %esi, -8
; X32-NEXT: movl {{[0-9]+}}(%esp), %ecx
; X32-NEXT: movl {{[0-9]+}}(%esp), %edx
; X32-NEXT: movl {{[0-9]+}}(%esp), %esi
@@ -219,9 +199,8 @@ define i32 @test_ccz(i64 %nr, i64* %addr) {
; X32-NEXT: #APP
; X32-NEXT: cmp %ecx,(%esi)
; X32-NEXT: #NO_APP
-; X32-NEXT: setne %al
+; X32-NEXT: sete %al
; X32-NEXT: popl %esi
-; X32-NEXT: .cfi_def_cfa_offset 4
; X32-NEXT: retl
;
; X64-LABEL: test_ccz:
@@ -230,22 +209,20 @@ define i32 @test_ccz(i64 %nr, i64* %addr) {
; X64-NEXT: #APP
; X64-NEXT: cmp %rdi,(%rsi)
; X64-NEXT: #NO_APP
-; X64-NEXT: setne %al
+; X64-NEXT: sete %al
; X64-NEXT: retq
entry:
%cc = tail call i32 asm "cmp $2,$1", "={@ccz},=*m,r,~{cc},~{dirflag},~{fpsr},~{flags}"(i64* %addr, i64 %nr) nounwind
- %tobool = icmp eq i32 %cc, 0
+ %tobool = icmp ne i32 %cc, 0
%rv = zext i1 %tobool to i32
ret i32 %rv
}
-define i32 @test_ccg(i64 %nr, i64* %addr) {
+define i32 @test_ccg(i64 %nr, i64* %addr) nounwind {
; X32-LABEL: test_ccg:
; X32: # %bb.0: # %entry
; X32-NEXT: pushl %esi
-; X32-NEXT: .cfi_def_cfa_offset 8
-; X32-NEXT: .cfi_offset %esi, -8
; X32-NEXT: movl {{[0-9]+}}(%esp), %ecx
; X32-NEXT: movl {{[0-9]+}}(%esp), %edx
; X32-NEXT: movl {{[0-9]+}}(%esp), %esi
@@ -253,9 +230,8 @@ define i32 @test_ccg(i64 %nr, i64* %addr) {
; X32-NEXT: #APP
; X32-NEXT: cmp %ecx,(%esi)
; X32-NEXT: #NO_APP
-; X32-NEXT: setle %al
+; X32-NEXT: setg %al
; X32-NEXT: popl %esi
-; X32-NEXT: .cfi_def_cfa_offset 4
; X32-NEXT: retl
;
; X64-LABEL: test_ccg:
@@ -264,22 +240,20 @@ define i32 @test_ccg(i64 %nr, i64* %addr) {
; X64-NEXT: #APP
; X64-NEXT: cmp %rdi,(%rsi)
; X64-NEXT: #NO_APP
-; X64-NEXT: setle %al
+; X64-NEXT: setg %al
; X64-NEXT: retq
entry:
%cc = tail call i32 asm "cmp $2,$1", "={@ccg},=*m,r,~{cc},~{dirflag},~{fpsr},~{flags}"(i64* %addr, i64 %nr) nounwind
- %tobool = icmp eq i32 %cc, 0
+ %tobool = icmp ne i32 %cc, 0
%rv = zext i1 %tobool to i32
ret i32 %rv
}
-define i32 @test_ccge(i64 %nr, i64* %addr) {
+define i32 @test_ccge(i64 %nr, i64* %addr) nounwind {
; X32-LABEL: test_ccge:
; X32: # %bb.0: # %entry
; X32-NEXT: pushl %esi
-; X32-NEXT: .cfi_def_cfa_offset 8
-; X32-NEXT: .cfi_offset %esi, -8
; X32-NEXT: movl {{[0-9]+}}(%esp), %ecx
; X32-NEXT: movl {{[0-9]+}}(%esp), %edx
; X32-NEXT: movl {{[0-9]+}}(%esp), %esi
@@ -287,9 +261,8 @@ define i32 @test_ccge(i64 %nr, i64* %addr) {
; X32-NEXT: #APP
; X32-NEXT: cmp %ecx,(%esi)
; X32-NEXT: #NO_APP
-; X32-NEXT: setl %al
+; X32-NEXT: setge %al
; X32-NEXT: popl %esi
-; X32-NEXT: .cfi_def_cfa_offset 4
; X32-NEXT: retl
;
; X64-LABEL: test_ccge:
@@ -298,22 +271,20 @@ define i32 @test_ccge(i64 %nr, i64* %addr) {
; X64-NEXT: #APP
; X64-NEXT: cmp %rdi,(%rsi)
; X64-NEXT: #NO_APP
-; X64-NEXT: setl %al
+; X64-NEXT: setge %al
; X64-NEXT: retq
entry:
%cc = tail call i32 asm "cmp $2,$1", "={@ccge},=*m,r,~{cc},~{dirflag},~{fpsr},~{flags}"(i64* %addr, i64 %nr) nounwind
- %tobool = icmp eq i32 %cc, 0
+ %tobool = icmp ne i32 %cc, 0
%rv = zext i1 %tobool to i32
ret i32 %rv
}
-define i32 @test_ccl(i64 %nr, i64* %addr) {
+define i32 @test_ccl(i64 %nr, i64* %addr) nounwind {
; X32-LABEL: test_ccl:
; X32: # %bb.0: # %entry
; X32-NEXT: pushl %esi
-; X32-NEXT: .cfi_def_cfa_offset 8
-; X32-NEXT: .cfi_offset %esi, -8
; X32-NEXT: movl {{[0-9]+}}(%esp), %ecx
; X32-NEXT: movl {{[0-9]+}}(%esp), %edx
; X32-NEXT: movl {{[0-9]+}}(%esp), %esi
@@ -321,9 +292,8 @@ define i32 @test_ccl(i64 %nr, i64* %addr) {
; X32-NEXT: #APP
; X32-NEXT: cmp %ecx,(%esi)
; X32-NEXT: #NO_APP
-; X32-NEXT: setge %al
+; X32-NEXT: setl %al
; X32-NEXT: popl %esi
-; X32-NEXT: .cfi_def_cfa_offset 4
; X32-NEXT: retl
;
; X64-LABEL: test_ccl:
@@ -332,22 +302,20 @@ define i32 @test_ccl(i64 %nr, i64* %addr) {
; X64-NEXT: #APP
; X64-NEXT: cmp %rdi,(%rsi)
; X64-NEXT: #NO_APP
-; X64-NEXT: setge %al
+; X64-NEXT: setl %al
; X64-NEXT: retq
entry:
%cc = tail call i32 asm "cmp $2,$1", "={@ccl},=*m,r,~{cc},~{dirflag},~{fpsr},~{flags}"(i64* %addr, i64 %nr) nounwind
- %tobool = icmp eq i32 %cc, 0
+ %tobool = icmp ne i32 %cc, 0
%rv = zext i1 %tobool to i32
ret i32 %rv
}
-define i32 @test_ccle(i64 %nr, i64* %addr) {
+define i32 @test_ccle(i64 %nr, i64* %addr) nounwind {
; X32-LABEL: test_ccle:
; X32: # %bb.0: # %entry
; X32-NEXT: pushl %esi
-; X32-NEXT: .cfi_def_cfa_offset 8
-; X32-NEXT: .cfi_offset %esi, -8
; X32-NEXT: movl {{[0-9]+}}(%esp), %ecx
; X32-NEXT: movl {{[0-9]+}}(%esp), %edx
; X32-NEXT: movl {{[0-9]+}}(%esp), %esi
@@ -355,9 +323,8 @@ define i32 @test_ccle(i64 %nr, i64* %addr) {
; X32-NEXT: #APP
; X32-NEXT: cmp %ecx,(%esi)
; X32-NEXT: #NO_APP
-; X32-NEXT: setg %al
+; X32-NEXT: setle %al
; X32-NEXT: popl %esi
-; X32-NEXT: .cfi_def_cfa_offset 4
; X32-NEXT: retl
;
; X64-LABEL: test_ccle:
@@ -366,22 +333,20 @@ define i32 @test_ccle(i64 %nr, i64* %addr) {
; X64-NEXT: #APP
; X64-NEXT: cmp %rdi,(%rsi)
; X64-NEXT: #NO_APP
-; X64-NEXT: setg %al
+; X64-NEXT: setle %al
; X64-NEXT: retq
entry:
%cc = tail call i32 asm "cmp $2,$1", "={@ccle},=*m,r,~{cc},~{dirflag},~{fpsr},~{flags}"(i64* %addr, i64 %nr) nounwind
- %tobool = icmp eq i32 %cc, 0
+ %tobool = icmp ne i32 %cc, 0
%rv = zext i1 %tobool to i32
ret i32 %rv
}
-define i32 @test_ccna(i64 %nr, i64* %addr) {
+define i32 @test_ccna(i64 %nr, i64* %addr) nounwind {
; X32-LABEL: test_ccna:
; X32: # %bb.0: # %entry
; X32-NEXT: pushl %esi
-; X32-NEXT: .cfi_def_cfa_offset 8
-; X32-NEXT: .cfi_offset %esi, -8
; X32-NEXT: movl {{[0-9]+}}(%esp), %ecx
; X32-NEXT: movl {{[0-9]+}}(%esp), %edx
; X32-NEXT: movl {{[0-9]+}}(%esp), %esi
@@ -389,9 +354,8 @@ define i32 @test_ccna(i64 %nr, i64* %addr) {
; X32-NEXT: #APP
; X32-NEXT: cmp %ecx,(%esi)
; X32-NEXT: #NO_APP
-; X32-NEXT: seta %al
+; X32-NEXT: setbe %al
; X32-NEXT: popl %esi
-; X32-NEXT: .cfi_def_cfa_offset 4
; X32-NEXT: retl
;
; X64-LABEL: test_ccna:
@@ -400,22 +364,20 @@ define i32 @test_ccna(i64 %nr, i64* %addr) {
; X64-NEXT: #APP
; X64-NEXT: cmp %rdi,(%rsi)
; X64-NEXT: #NO_APP
-; X64-NEXT: seta %al
+; X64-NEXT: setbe %al
; X64-NEXT: retq
entry:
%cc = tail call i32 asm "cmp $2,$1", "={@ccna},=*m,r,~{cc},~{dirflag},~{fpsr},~{flags}"(i64* %addr, i64 %nr) nounwind
- %tobool = icmp eq i32 %cc, 0
+ %tobool = icmp ne i32 %cc, 0
%rv = zext i1 %tobool to i32
ret i32 %rv
}
-define i32 @test_ccnae(i64 %nr, i64* %addr) {
+define i32 @test_ccnae(i64 %nr, i64* %addr) nounwind {
; X32-LABEL: test_ccnae:
; X32: # %bb.0: # %entry
; X32-NEXT: pushl %esi
-; X32-NEXT: .cfi_def_cfa_offset 8
-; X32-NEXT: .cfi_offset %esi, -8
; X32-NEXT: movl {{[0-9]+}}(%esp), %ecx
; X32-NEXT: movl {{[0-9]+}}(%esp), %edx
; X32-NEXT: movl {{[0-9]+}}(%esp), %esi
@@ -423,9 +385,8 @@ define i32 @test_ccnae(i64 %nr, i64* %addr) {
; X32-NEXT: #APP
; X32-NEXT: cmp %ecx,(%esi)
; X32-NEXT: #NO_APP
-; X32-NEXT: setae %al
+; X32-NEXT: setb %al
; X32-NEXT: popl %esi
-; X32-NEXT: .cfi_def_cfa_offset 4
; X32-NEXT: retl
;
; X64-LABEL: test_ccnae:
@@ -434,22 +395,20 @@ define i32 @test_ccnae(i64 %nr, i64* %addr) {
; X64-NEXT: #APP
; X64-NEXT: cmp %rdi,(%rsi)
; X64-NEXT: #NO_APP
-; X64-NEXT: setae %al
+; X64-NEXT: setb %al
; X64-NEXT: retq
entry:
%cc = tail call i32 asm "cmp $2,$1", "={@ccnae},=*m,r,~{cc},~{dirflag},~{fpsr},~{flags}"(i64* %addr, i64 %nr) nounwind
- %tobool = icmp eq i32 %cc, 0
+ %tobool = icmp ne i32 %cc, 0
%rv = zext i1 %tobool to i32
ret i32 %rv
}
-define i32 @test_ccnb(i64 %nr, i64* %addr) {
+define i32 @test_ccnb(i64 %nr, i64* %addr) nounwind {
; X32-LABEL: test_ccnb:
; X32: # %bb.0: # %entry
; X32-NEXT: pushl %esi
-; X32-NEXT: .cfi_def_cfa_offset 8
-; X32-NEXT: .cfi_offset %esi, -8
; X32-NEXT: movl {{[0-9]+}}(%esp), %ecx
; X32-NEXT: movl {{[0-9]+}}(%esp), %edx
; X32-NEXT: movl {{[0-9]+}}(%esp), %esi
@@ -457,9 +416,8 @@ define i32 @test_ccnb(i64 %nr, i64* %addr) {
; X32-NEXT: #APP
; X32-NEXT: cmp %ecx,(%esi)
; X32-NEXT: #NO_APP
-; X32-NEXT: setb %al
+; X32-NEXT: setae %al
; X32-NEXT: popl %esi
-; X32-NEXT: .cfi_def_cfa_offset 4
; X32-NEXT: retl
;
; X64-LABEL: test_ccnb:
@@ -468,22 +426,20 @@ define i32 @test_ccnb(i64 %nr, i64* %addr) {
; X64-NEXT: #APP
; X64-NEXT: cmp %rdi,(%rsi)
; X64-NEXT: #NO_APP
-; X64-NEXT: setb %al
+; X64-NEXT: setae %al
; X64-NEXT: retq
entry:
%cc = tail call i32 asm "cmp $2,$1", "={@ccnb},=*m,r,~{cc},~{dirflag},~{fpsr},~{flags}"(i64* %addr, i64 %nr) nounwind
- %tobool = icmp eq i32 %cc, 0
+ %tobool = icmp ne i32 %cc, 0
%rv = zext i1 %tobool to i32
ret i32 %rv
}
-define i32 @test_ccnbe(i64 %nr, i64* %addr) {
+define i32 @test_ccnbe(i64 %nr, i64* %addr) nounwind {
; X32-LABEL: test_ccnbe:
; X32: # %bb.0: # %entry
; X32-NEXT: pushl %esi
-; X32-NEXT: .cfi_def_cfa_offset 8
-; X32-NEXT: .cfi_offset %esi, -8
; X32-NEXT: movl {{[0-9]+}}(%esp), %ecx
; X32-NEXT: movl {{[0-9]+}}(%esp), %edx
; X32-NEXT: movl {{[0-9]+}}(%esp), %esi
@@ -491,9 +447,8 @@ define i32 @test_ccnbe(i64 %nr, i64* %addr) {
; X32-NEXT: #APP
; X32-NEXT: cmp %ecx,(%esi)
; X32-NEXT: #NO_APP
-; X32-NEXT: setbe %al
+; X32-NEXT: seta %al
; X32-NEXT: popl %esi
-; X32-NEXT: .cfi_def_cfa_offset 4
; X32-NEXT: retl
;
; X64-LABEL: test_ccnbe:
@@ -502,22 +457,20 @@ define i32 @test_ccnbe(i64 %nr, i64* %addr) {
; X64-NEXT: #APP
; X64-NEXT: cmp %rdi,(%rsi)
; X64-NEXT: #NO_APP
-; X64-NEXT: setbe %al
+; X64-NEXT: seta %al
; X64-NEXT: retq
entry:
%cc = tail call i32 asm "cmp $2,$1", "={@ccnbe},=*m,r,~{cc},~{dirflag},~{fpsr},~{flags}"(i64* %addr, i64 %nr) nounwind
- %tobool = icmp eq i32 %cc, 0
+ %tobool = icmp ne i32 %cc, 0
%rv = zext i1 %tobool to i32
ret i32 %rv
}
-define i32 @test_ccnc(i64 %nr, i64* %addr) {
+define i32 @test_ccnc(i64 %nr, i64* %addr) nounwind {
; X32-LABEL: test_ccnc:
; X32: # %bb.0: # %entry
; X32-NEXT: pushl %esi
-; X32-NEXT: .cfi_def_cfa_offset 8
-; X32-NEXT: .cfi_offset %esi, -8
; X32-NEXT: movl {{[0-9]+}}(%esp), %ecx
; X32-NEXT: movl {{[0-9]+}}(%esp), %edx
; X32-NEXT: movl {{[0-9]+}}(%esp), %esi
@@ -525,9 +478,8 @@ define i32 @test_ccnc(i64 %nr, i64* %addr) {
; X32-NEXT: #APP
; X32-NEXT: cmp %ecx,(%esi)
; X32-NEXT: #NO_APP
-; X32-NEXT: setb %al
+; X32-NEXT: setae %al
; X32-NEXT: popl %esi
-; X32-NEXT: .cfi_def_cfa_offset 4
; X32-NEXT: retl
;
; X64-LABEL: test_ccnc:
@@ -536,22 +488,20 @@ define i32 @test_ccnc(i64 %nr, i64* %addr) {
; X64-NEXT: #APP
; X64-NEXT: cmp %rdi,(%rsi)
; X64-NEXT: #NO_APP
-; X64-NEXT: setb %al
+; X64-NEXT: setae %al
; X64-NEXT: retq
entry:
%cc = tail call i32 asm "cmp $2,$1", "={@ccnc},=*m,r,~{cc},~{dirflag},~{fpsr},~{flags}"(i64* %addr, i64 %nr) nounwind
- %tobool = icmp eq i32 %cc, 0
+ %tobool = icmp ne i32 %cc, 0
%rv = zext i1 %tobool to i32
ret i32 %rv
}
-define i32 @test_ccne(i64 %nr, i64* %addr) {
+define i32 @test_ccne(i64 %nr, i64* %addr) nounwind {
; X32-LABEL: test_ccne:
; X32: # %bb.0: # %entry
; X32-NEXT: pushl %esi
-; X32-NEXT: .cfi_def_cfa_offset 8
-; X32-NEXT: .cfi_offset %esi, -8
; X32-NEXT: movl {{[0-9]+}}(%esp), %ecx
; X32-NEXT: movl {{[0-9]+}}(%esp), %edx
; X32-NEXT: movl {{[0-9]+}}(%esp), %esi
@@ -559,9 +509,8 @@ define i32 @test_ccne(i64 %nr, i64* %addr) {
; X32-NEXT: #APP
; X32-NEXT: cmp %ecx,(%esi)
; X32-NEXT: #NO_APP
-; X32-NEXT: sete %al
+; X32-NEXT: setne %al
; X32-NEXT: popl %esi
-; X32-NEXT: .cfi_def_cfa_offset 4
; X32-NEXT: retl
;
; X64-LABEL: test_ccne:
@@ -570,22 +519,20 @@ define i32 @test_ccne(i64 %nr, i64* %addr) {
; X64-NEXT: #APP
; X64-NEXT: cmp %rdi,(%rsi)
; X64-NEXT: #NO_APP
-; X64-NEXT: sete %al
+; X64-NEXT: setne %al
; X64-NEXT: retq
entry:
%cc = tail call i32 asm "cmp $2,$1", "={@ccne},=*m,r,~{cc},~{dirflag},~{fpsr},~{flags}"(i64* %addr, i64 %nr) nounwind
- %tobool = icmp eq i32 %cc, 0
+ %tobool = icmp ne i32 %cc, 0
%rv = zext i1 %tobool to i32
ret i32 %rv
}
-define i32 @test_ccnz(i64 %nr, i64* %addr) {
+define i32 @test_ccnz(i64 %nr, i64* %addr) nounwind {
; X32-LABEL: test_ccnz:
; X32: # %bb.0: # %entry
; X32-NEXT: pushl %esi
-; X32-NEXT: .cfi_def_cfa_offset 8
-; X32-NEXT: .cfi_offset %esi, -8
; X32-NEXT: movl {{[0-9]+}}(%esp), %ecx
; X32-NEXT: movl {{[0-9]+}}(%esp), %edx
; X32-NEXT: movl {{[0-9]+}}(%esp), %esi
@@ -593,9 +540,8 @@ define i32 @test_ccnz(i64 %nr, i64* %addr) {
; X32-NEXT: #APP
; X32-NEXT: cmp %ecx,(%esi)
; X32-NEXT: #NO_APP
-; X32-NEXT: sete %al
+; X32-NEXT: setne %al
; X32-NEXT: popl %esi
-; X32-NEXT: .cfi_def_cfa_offset 4
; X32-NEXT: retl
;
; X64-LABEL: test_ccnz:
@@ -604,22 +550,20 @@ define i32 @test_ccnz(i64 %nr, i64* %addr) {
; X64-NEXT: #APP
; X64-NEXT: cmp %rdi,(%rsi)
; X64-NEXT: #NO_APP
-; X64-NEXT: sete %al
+; X64-NEXT: setne %al
; X64-NEXT: retq
entry:
%cc = tail call i32 asm "cmp $2,$1", "={@ccnz},=*m,r,~{cc},~{dirflag},~{fpsr},~{flags}"(i64* %addr, i64 %nr) nounwind
- %tobool = icmp eq i32 %cc, 0
+ %tobool = icmp ne i32 %cc, 0
%rv = zext i1 %tobool to i32
ret i32 %rv
}
-define i32 @test_ccng(i64 %nr, i64* %addr) {
+define i32 @test_ccng(i64 %nr, i64* %addr) nounwind {
; X32-LABEL: test_ccng:
; X32: # %bb.0: # %entry
; X32-NEXT: pushl %esi
-; X32-NEXT: .cfi_def_cfa_offset 8
-; X32-NEXT: .cfi_offset %esi, -8
; X32-NEXT: movl {{[0-9]+}}(%esp), %ecx
; X32-NEXT: movl {{[0-9]+}}(%esp), %edx
; X32-NEXT: movl {{[0-9]+}}(%esp), %esi
@@ -627,9 +571,8 @@ define i32 @test_ccng(i64 %nr, i64* %addr) {
; X32-NEXT: #APP
; X32-NEXT: cmp %ecx,(%esi)
; X32-NEXT: #NO_APP
-; X32-NEXT: setg %al
+; X32-NEXT: setle %al
; X32-NEXT: popl %esi
-; X32-NEXT: .cfi_def_cfa_offset 4
; X32-NEXT: retl
;
; X64-LABEL: test_ccng:
@@ -638,22 +581,20 @@ define i32 @test_ccng(i64 %nr, i64* %addr) {
; X64-NEXT: #APP
; X64-NEXT: cmp %rdi,(%rsi)
; X64-NEXT: #NO_APP
-; X64-NEXT: setg %al
+; X64-NEXT: setle %al
; X64-NEXT: retq
entry:
%cc = tail call i32 asm "cmp $2,$1", "={@ccng},=*m,r,~{cc},~{dirflag},~{fpsr},~{flags}"(i64* %addr, i64 %nr) nounwind
- %tobool = icmp eq i32 %cc, 0
+ %tobool = icmp ne i32 %cc, 0
%rv = zext i1 %tobool to i32
ret i32 %rv
}
-define i32 @test_ccnge(i64 %nr, i64* %addr) {
+define i32 @test_ccnge(i64 %nr, i64* %addr) nounwind {
; X32-LABEL: test_ccnge:
; X32: # %bb.0: # %entry
; X32-NEXT: pushl %esi
-; X32-NEXT: .cfi_def_cfa_offset 8
-; X32-NEXT: .cfi_offset %esi, -8
; X32-NEXT: movl {{[0-9]+}}(%esp), %ecx
; X32-NEXT: movl {{[0-9]+}}(%esp), %edx
; X32-NEXT: movl {{[0-9]+}}(%esp), %esi
@@ -661,9 +602,8 @@ define i32 @test_ccnge(i64 %nr, i64* %addr) {
; X32-NEXT: #APP
; X32-NEXT: cmp %ecx,(%esi)
; X32-NEXT: #NO_APP
-; X32-NEXT: setge %al
+; X32-NEXT: setl %al
; X32-NEXT: popl %esi
-; X32-NEXT: .cfi_def_cfa_offset 4
; X32-NEXT: retl
;
; X64-LABEL: test_ccnge:
@@ -672,22 +612,20 @@ define i32 @test_ccnge(i64 %nr, i64* %addr) {
; X64-NEXT: #APP
; X64-NEXT: cmp %rdi,(%rsi)
; X64-NEXT: #NO_APP
-; X64-NEXT: setge %al
+; X64-NEXT: setl %al
; X64-NEXT: retq
entry:
%cc = tail call i32 asm "cmp $2,$1", "={@ccnge},=*m,r,~{cc},~{dirflag},~{fpsr},~{flags}"(i64* %addr, i64 %nr) nounwind
- %tobool = icmp eq i32 %cc, 0
+ %tobool = icmp ne i32 %cc, 0
%rv = zext i1 %tobool to i32
ret i32 %rv
}
-define i32 @test_ccnl(i64 %nr, i64* %addr) {
+define i32 @test_ccnl(i64 %nr, i64* %addr) nounwind {
; X32-LABEL: test_ccnl:
; X32: # %bb.0: # %entry
; X32-NEXT: pushl %esi
-; X32-NEXT: .cfi_def_cfa_offset 8
-; X32-NEXT: .cfi_offset %esi, -8
; X32-NEXT: movl {{[0-9]+}}(%esp), %ecx
; X32-NEXT: movl {{[0-9]+}}(%esp), %edx
; X32-NEXT: movl {{[0-9]+}}(%esp), %esi
@@ -695,9 +633,8 @@ define i32 @test_ccnl(i64 %nr, i64* %addr) {
; X32-NEXT: #APP
; X32-NEXT: cmp %ecx,(%esi)
; X32-NEXT: #NO_APP
-; X32-NEXT: setl %al
+; X32-NEXT: setge %al
; X32-NEXT: popl %esi
-; X32-NEXT: .cfi_def_cfa_offset 4
; X32-NEXT: retl
;
; X64-LABEL: test_ccnl:
@@ -706,22 +643,20 @@ define i32 @test_ccnl(i64 %nr, i64* %addr) {
; X64-NEXT: #APP
; X64-NEXT: cmp %rdi,(%rsi)
; X64-NEXT: #NO_APP
-; X64-NEXT: setl %al
+; X64-NEXT: setge %al
; X64-NEXT: retq
entry:
%cc = tail call i32 asm "cmp $2,$1", "={@ccnl},=*m,r,~{cc},~{dirflag},~{fpsr},~{flags}"(i64* %addr, i64 %nr) nounwind
- %tobool = icmp eq i32 %cc, 0
+ %tobool = icmp ne i32 %cc, 0
%rv = zext i1 %tobool to i32
ret i32 %rv
}
-define i32 @test_ccnle(i64 %nr, i64* %addr) {
+define i32 @test_ccnle(i64 %nr, i64* %addr) nounwind {
; X32-LABEL: test_ccnle:
; X32: # %bb.0: # %entry
; X32-NEXT: pushl %esi
-; X32-NEXT: .cfi_def_cfa_offset 8
-; X32-NEXT: .cfi_offset %esi, -8
; X32-NEXT: movl {{[0-9]+}}(%esp), %ecx
; X32-NEXT: movl {{[0-9]+}}(%esp), %edx
; X32-NEXT: movl {{[0-9]+}}(%esp), %esi
@@ -729,9 +664,8 @@ define i32 @test_ccnle(i64 %nr, i64* %addr) {
; X32-NEXT: #APP
; X32-NEXT: cmp %ecx,(%esi)
; X32-NEXT: #NO_APP
-; X32-NEXT: setle %al
+; X32-NEXT: setg %al
; X32-NEXT: popl %esi
-; X32-NEXT: .cfi_def_cfa_offset 4
; X32-NEXT: retl
;
; X64-LABEL: test_ccnle:
@@ -740,22 +674,20 @@ define i32 @test_ccnle(i64 %nr, i64* %addr) {
; X64-NEXT: #APP
; X64-NEXT: cmp %rdi,(%rsi)
; X64-NEXT: #NO_APP
-; X64-NEXT: setle %al
+; X64-NEXT: setg %al
; X64-NEXT: retq
entry:
%cc = tail call i32 asm "cmp $2,$1", "={@ccnle},=*m,r,~{cc},~{dirflag},~{fpsr},~{flags}"(i64* %addr, i64 %nr) nounwind
- %tobool = icmp eq i32 %cc, 0
+ %tobool = icmp ne i32 %cc, 0
%rv = zext i1 %tobool to i32
ret i32 %rv
}
-define i32 @test_ccno(i64 %nr, i64* %addr) {
+define i32 @test_ccno(i64 %nr, i64* %addr) nounwind {
; X32-LABEL: test_ccno:
; X32: # %bb.0: # %entry
; X32-NEXT: pushl %esi
-; X32-NEXT: .cfi_def_cfa_offset 8
-; X32-NEXT: .cfi_offset %esi, -8
; X32-NEXT: movl {{[0-9]+}}(%esp), %ecx
; X32-NEXT: movl {{[0-9]+}}(%esp), %edx
; X32-NEXT: movl {{[0-9]+}}(%esp), %esi
@@ -763,9 +695,8 @@ define i32 @test_ccno(i64 %nr, i64* %addr) {
; X32-NEXT: #APP
; X32-NEXT: cmp %ecx,(%esi)
; X32-NEXT: #NO_APP
-; X32-NEXT: seto %al
+; X32-NEXT: setno %al
; X32-NEXT: popl %esi
-; X32-NEXT: .cfi_def_cfa_offset 4
; X32-NEXT: retl
;
; X64-LABEL: test_ccno:
@@ -774,22 +705,20 @@ define i32 @test_ccno(i64 %nr, i64* %addr) {
; X64-NEXT: #APP
; X64-NEXT: cmp %rdi,(%rsi)
; X64-NEXT: #NO_APP
-; X64-NEXT: seto %al
+; X64-NEXT: setno %al
; X64-NEXT: retq
entry:
%cc = tail call i32 asm "cmp $2,$1", "={@ccno},=*m,r,~{cc},~{dirflag},~{fpsr},~{flags}"(i64* %addr, i64 %nr) nounwind
- %tobool = icmp eq i32 %cc, 0
+ %tobool = icmp ne i32 %cc, 0
%rv = zext i1 %tobool to i32
ret i32 %rv
}
-define i32 @test_ccnp(i64 %nr, i64* %addr) {
+define i32 @test_ccnp(i64 %nr, i64* %addr) nounwind {
; X32-LABEL: test_ccnp:
; X32: # %bb.0: # %entry
; X32-NEXT: pushl %esi
-; X32-NEXT: .cfi_def_cfa_offset 8
-; X32-NEXT: .cfi_offset %esi, -8
; X32-NEXT: movl {{[0-9]+}}(%esp), %ecx
; X32-NEXT: movl {{[0-9]+}}(%esp), %edx
; X32-NEXT: movl {{[0-9]+}}(%esp), %esi
@@ -797,9 +726,8 @@ define i32 @test_ccnp(i64 %nr, i64* %addr) {
; X32-NEXT: #APP
; X32-NEXT: cmp %ecx,(%esi)
; X32-NEXT: #NO_APP
-; X32-NEXT: setnp %al
+; X32-NEXT: setp %al
; X32-NEXT: popl %esi
-; X32-NEXT: .cfi_def_cfa_offset 4
; X32-NEXT: retl
;
; X64-LABEL: test_ccnp:
@@ -808,22 +736,20 @@ define i32 @test_ccnp(i64 %nr, i64* %addr) {
; X64-NEXT: #APP
; X64-NEXT: cmp %rdi,(%rsi)
; X64-NEXT: #NO_APP
-; X64-NEXT: setnp %al
+; X64-NEXT: setp %al
; X64-NEXT: retq
entry:
%cc = tail call i32 asm "cmp $2,$1", "={@ccnp},=*m,r,~{cc},~{dirflag},~{fpsr},~{flags}"(i64* %addr, i64 %nr) nounwind
- %tobool = icmp eq i32 %cc, 0
+ %tobool = icmp ne i32 %cc, 0
%rv = zext i1 %tobool to i32
ret i32 %rv
}
-define i32 @test_ccns(i64 %nr, i64* %addr) {
+define i32 @test_ccns(i64 %nr, i64* %addr) nounwind {
; X32-LABEL: test_ccns:
; X32: # %bb.0: # %entry
; X32-NEXT: pushl %esi
-; X32-NEXT: .cfi_def_cfa_offset 8
-; X32-NEXT: .cfi_offset %esi, -8
; X32-NEXT: movl {{[0-9]+}}(%esp), %ecx
; X32-NEXT: movl {{[0-9]+}}(%esp), %edx
; X32-NEXT: movl {{[0-9]+}}(%esp), %esi
@@ -831,9 +757,8 @@ define i32 @test_ccns(i64 %nr, i64* %addr) {
; X32-NEXT: #APP
; X32-NEXT: cmp %ecx,(%esi)
; X32-NEXT: #NO_APP
-; X32-NEXT: sets %al
+; X32-NEXT: setns %al
; X32-NEXT: popl %esi
-; X32-NEXT: .cfi_def_cfa_offset 4
; X32-NEXT: retl
;
; X64-LABEL: test_ccns:
@@ -842,22 +767,20 @@ define i32 @test_ccns(i64 %nr, i64* %addr) {
; X64-NEXT: #APP
; X64-NEXT: cmp %rdi,(%rsi)
; X64-NEXT: #NO_APP
-; X64-NEXT: sets %al
+; X64-NEXT: setns %al
; X64-NEXT: retq
entry:
%cc = tail call i32 asm "cmp $2,$1", "={@ccns},=*m,r,~{cc},~{dirflag},~{fpsr},~{flags}"(i64* %addr, i64 %nr) nounwind
- %tobool = icmp eq i32 %cc, 0
+ %tobool = icmp ne i32 %cc, 0
%rv = zext i1 %tobool to i32
ret i32 %rv
}
-define i32 @test_cco(i64 %nr, i64* %addr) {
+define i32 @test_cco(i64 %nr, i64* %addr) nounwind {
; X32-LABEL: test_cco:
; X32: # %bb.0: # %entry
; X32-NEXT: pushl %esi
-; X32-NEXT: .cfi_def_cfa_offset 8
-; X32-NEXT: .cfi_offset %esi, -8
; X32-NEXT: movl {{[0-9]+}}(%esp), %ecx
; X32-NEXT: movl {{[0-9]+}}(%esp), %edx
; X32-NEXT: movl {{[0-9]+}}(%esp), %esi
@@ -865,9 +788,8 @@ define i32 @test_cco(i64 %nr, i64* %addr) {
; X32-NEXT: #APP
; X32-NEXT: cmp %ecx,(%esi)
; X32-NEXT: #NO_APP
-; X32-NEXT: setno %al
+; X32-NEXT: seto %al
; X32-NEXT: popl %esi
-; X32-NEXT: .cfi_def_cfa_offset 4
; X32-NEXT: retl
;
; X64-LABEL: test_cco:
@@ -876,22 +798,20 @@ define i32 @test_cco(i64 %nr, i64* %addr) {
; X64-NEXT: #APP
; X64-NEXT: cmp %rdi,(%rsi)
; X64-NEXT: #NO_APP
-; X64-NEXT: setno %al
+; X64-NEXT: seto %al
; X64-NEXT: retq
entry:
%cc = tail call i32 asm "cmp $2,$1", "={@cco},=*m,r,~{cc},~{dirflag},~{fpsr},~{flags}"(i64* %addr, i64 %nr) nounwind
- %tobool = icmp eq i32 %cc, 0
+ %tobool = icmp ne i32 %cc, 0
%rv = zext i1 %tobool to i32
ret i32 %rv
}
-define i32 @test_ccp(i64 %nr, i64* %addr) {
+define i32 @test_ccp(i64 %nr, i64* %addr) nounwind {
; X32-LABEL: test_ccp:
; X32: # %bb.0: # %entry
; X32-NEXT: pushl %esi
-; X32-NEXT: .cfi_def_cfa_offset 8
-; X32-NEXT: .cfi_offset %esi, -8
; X32-NEXT: movl {{[0-9]+}}(%esp), %ecx
; X32-NEXT: movl {{[0-9]+}}(%esp), %edx
; X32-NEXT: movl {{[0-9]+}}(%esp), %esi
@@ -899,9 +819,8 @@ define i32 @test_ccp(i64 %nr, i64* %addr) {
; X32-NEXT: #APP
; X32-NEXT: cmp %ecx,(%esi)
; X32-NEXT: #NO_APP
-; X32-NEXT: setnp %al
+; X32-NEXT: setp %al
; X32-NEXT: popl %esi
-; X32-NEXT: .cfi_def_cfa_offset 4
; X32-NEXT: retl
;
; X64-LABEL: test_ccp:
@@ -910,22 +829,20 @@ define i32 @test_ccp(i64 %nr, i64* %addr) {
; X64-NEXT: #APP
; X64-NEXT: cmp %rdi,(%rsi)
; X64-NEXT: #NO_APP
-; X64-NEXT: setnp %al
+; X64-NEXT: setp %al
; X64-NEXT: retq
entry:
%cc = tail call i32 asm "cmp $2,$1", "={@ccp},=*m,r,~{cc},~{dirflag},~{fpsr},~{flags}"(i64* %addr, i64 %nr) nounwind
- %tobool = icmp eq i32 %cc, 0
+ %tobool = icmp ne i32 %cc, 0
%rv = zext i1 %tobool to i32
ret i32 %rv
}
-define i32 @test_ccs(i64 %nr, i64* %addr) {
+define i32 @test_ccs(i64 %nr, i64* %addr) nounwind {
; X32-LABEL: test_ccs:
; X32: # %bb.0: # %entry
; X32-NEXT: pushl %esi
-; X32-NEXT: .cfi_def_cfa_offset 8
-; X32-NEXT: .cfi_offset %esi, -8
; X32-NEXT: movl {{[0-9]+}}(%esp), %ecx
; X32-NEXT: movl {{[0-9]+}}(%esp), %edx
; X32-NEXT: movl {{[0-9]+}}(%esp), %esi
@@ -933,9 +850,8 @@ define i32 @test_ccs(i64 %nr, i64* %addr) {
; X32-NEXT: #APP
; X32-NEXT: cmp %ecx,(%esi)
; X32-NEXT: #NO_APP
-; X32-NEXT: setns %al
+; X32-NEXT: sets %al
; X32-NEXT: popl %esi
-; X32-NEXT: .cfi_def_cfa_offset 4
; X32-NEXT: retl
;
; X64-LABEL: test_ccs:
@@ -944,11 +860,11 @@ define i32 @test_ccs(i64 %nr, i64* %addr) {
; X64-NEXT: #APP
; X64-NEXT: cmp %rdi,(%rsi)
; X64-NEXT: #NO_APP
-; X64-NEXT: setns %al
+; X64-NEXT: sets %al
; X64-NEXT: retq
entry:
%cc = tail call i32 asm "cmp $2,$1", "={@ccs},=*m,r,~{cc},~{dirflag},~{fpsr},~{flags}"(i64* %addr, i64 %nr) nounwind
- %tobool = icmp eq i32 %cc, 0
+ %tobool = icmp ne i32 %cc, 0
%rv = zext i1 %tobool to i32
ret i32 %rv
}
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