[PATCH] D87621: [AMDGPU] Add XDL resource to scheduling model
Jay Foad via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Wed Sep 16 07:13:34 PDT 2020
foad added inline comments.
================
Comment at: llvm/lib/Target/AMDGPU/SISchedule.td:107-109
+def HWXDL : ProcResource<1> { // MFMA CU
+ let BufferSize = 0;
+}
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As I understand it, from reading comments in MCSchedule.h and TargetSchedule.td, you have to set BufferSize = 0 to model instructions that immediately consume a resource for one or more cycles. It would be useful to do this for some VALU instructions, e.g. some transcendental instructions, that take more than one cycle to issue (on gfx10).
What I don't understand is, for a normal single-cycle issue (on gfx10) SALU or VALU instruction, should we use BufferSize = 0 or 1 ? What practical difference does it make?
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D87621/new/
https://reviews.llvm.org/D87621
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