[PATCH] D87430: [ARM] Add heuristic to avoid lowering calls to blx for Thumb1 in ARMTargetLowering::LowerCall

[Dave Green via Phabricator via llvm-commits]

dmgreen added inline comments.


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Comment at: llvm/lib/Target/ARM/ARMISelLowering.cpp:2261
+      // Hardcoded for now.
+      unsigned nRegs = 7;
+
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Hmm. Not sure. Perhaps this can use something like getRegClassFor(MVT::i32)->getNumRegs()? It's still probably a very rough estimate of allocatable registers.


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Comment at: llvm/test/CodeGen/ARM/minsize-call-cse-2.ll:11
+; CHECK: bl g
+define void @f(i32* %p, i32 %x, i32 %y, i32 %z, i32 %a) optsize minsize  {
+entry:
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Can you add more tests of various sizes.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D87430/new/

https://reviews.llvm.org/D87430