[PATCH] D87236: [X86][SSE2] Use smarter instruction patterns for lowering UMIN/UMAX with v8i16 and SMIN/SMAX with v16i8.

Tue Sep 8 10:35:38 PDT 2020

RKSimon added a comment.

In D87236#2260127 <https://reviews.llvm.org/D87236#2260127>, @craig.topper wrote:

> @RKSimon Can we match the horizontal reductions early during DAG combine and insert the sign bit flip at the top and bottom of the tree and rewrite the intermediate min/maxes to the other type? That would hide them from the lowering code changes.

I don't think we currently do anything x86-specific for pre-SSE41 min/max reductions, and even then we just do the PHMINPOSUW vXi8/vXi16 cases.

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  https://reviews.llvm.org/D87236/new/

https://reviews.llvm.org/D87236