[llvm] 046f240 - [Test] More tests where IndVars fails to eliminate a range check
Max Kazantsev via llvm-commits
llvm-commits at lists.llvm.org
Tue Sep 8 00:43:49 PDT 2020
Author: Max Kazantsev
Date: 2020-09-08T14:43:29+07:00
New Revision: 046f2402025c2ac93c1efc02acd60c5222e052f7
URL: https://github.com/llvm/llvm-project/commit/046f2402025c2ac93c1efc02acd60c5222e052f7
DIFF: https://github.com/llvm/llvm-project/commit/046f2402025c2ac93c1efc02acd60c5222e052f7.diff
LOG: [Test] More tests where IndVars fails to eliminate a range check
Added:
Modified:
llvm/test/Transforms/IndVarSimplify/monotonic_checks.ll
Removed:
################################################################################
diff --git a/llvm/test/Transforms/IndVarSimplify/monotonic_checks.ll b/llvm/test/Transforms/IndVarSimplify/monotonic_checks.ll
index 988b3923263f..048254427c5f 100644
--- a/llvm/test/Transforms/IndVarSimplify/monotonic_checks.ll
+++ b/llvm/test/Transforms/IndVarSimplify/monotonic_checks.ll
@@ -83,8 +83,8 @@ exit:
ret i32 0
}
-; Monotonic incrementing iv. we should be able to prove that %iv.next <s len
-; basing on its nsw and the fact that its starting value <s len.
+; Monotonic incrementing iv. we should be able to prove that %iv.next >s len
+; basing on its nsw and the fact that its starting value >s len.
define i32 @test_02(i32* %p) {
; CHECK-LABEL: @test_02(
; CHECK-NEXT: entry:
@@ -164,6 +164,84 @@ exit:
ret i32 0
}
+define i32 @test_03(i32* %p) {
+; CHECK-LABEL: @test_03(
+; CHECK-NEXT: entry:
+; CHECK-NEXT: [[LEN:%.*]] = load i32, i32* [[P:%.*]], align 4, [[RNG2:!range !.*]]
+; CHECK-NEXT: br label [[LOOP:%.*]]
+; CHECK: loop:
+; CHECK-NEXT: [[IV:%.*]] = phi i32 [ [[LEN]], [[ENTRY:%.*]] ], [ [[IV_NEXT:%.*]], [[BACKEDGE:%.*]] ]
+; CHECK-NEXT: [[IV_NEXT]] = add nuw nsw i32 [[IV]], 1
+; CHECK-NEXT: [[RC:%.*]] = icmp ugt i32 [[IV_NEXT]], [[LEN]]
+; CHECK-NEXT: br i1 [[RC]], label [[BACKEDGE]], label [[FAIL:%.*]]
+; CHECK: backedge:
+; CHECK-NEXT: [[LOOP_COND:%.*]] = icmp ne i32 [[IV]], 1000
+; CHECK-NEXT: br i1 [[LOOP_COND]], label [[LOOP]], label [[EXIT:%.*]]
+; CHECK: fail:
+; CHECK-NEXT: ret i32 -1
+; CHECK: exit:
+; CHECK-NEXT: ret i32 0
+;
+entry:
+ %len = load i32, i32* %p, !range !2
+ br label %loop
+
+loop:
+ %iv = phi i32 [%len, %entry], [%iv.next, %backedge]
+ %iv.next = add i32 %iv, 1
+ %rc = icmp sgt i32 %iv.next, %len
+ br i1 %rc, label %backedge, label %fail
+
+backedge:
+ %loop.cond = icmp ne i32 %iv, 1000
+ br i1 %loop.cond, label %loop, label %exit
+
+fail:
+ ret i32 -1
+
+exit:
+ ret i32 0
+}
+
+define i32 @test_04(i32* %p) {
+; CHECK-LABEL: @test_04(
+; CHECK-NEXT: entry:
+; CHECK-NEXT: [[LEN:%.*]] = load i32, i32* [[P:%.*]], align 4, [[RNG2]]
+; CHECK-NEXT: br label [[LOOP:%.*]]
+; CHECK: loop:
+; CHECK-NEXT: [[IV:%.*]] = phi i32 [ [[LEN]], [[ENTRY:%.*]] ], [ [[IV_NEXT:%.*]], [[BACKEDGE:%.*]] ]
+; CHECK-NEXT: [[IV_NEXT]] = add nsw i32 [[IV]], -1
+; CHECK-NEXT: [[RC:%.*]] = icmp slt i32 [[IV_NEXT]], [[LEN]]
+; CHECK-NEXT: br i1 [[RC]], label [[BACKEDGE]], label [[FAIL:%.*]]
+; CHECK: backedge:
+; CHECK-NEXT: [[LOOP_COND:%.*]] = icmp ne i32 [[IV]], 0
+; CHECK-NEXT: br i1 [[LOOP_COND]], label [[LOOP]], label [[EXIT:%.*]]
+; CHECK: fail:
+; CHECK-NEXT: ret i32 -1
+; CHECK: exit:
+; CHECK-NEXT: ret i32 0
+;
+entry:
+ %len = load i32, i32* %p, !range !2
+ br label %loop
+
+loop:
+ %iv = phi i32 [%len, %entry], [%iv.next, %backedge]
+ %iv.next = add i32 %iv, -1
+ %rc = icmp slt i32 %iv.next, %len
+ br i1 %rc, label %backedge, label %fail
+
+backedge:
+ %loop.cond = icmp ne i32 %iv, 0
+ br i1 %loop.cond, label %loop, label %exit
+
+fail:
+ ret i32 -1
+
+exit:
+ ret i32 0
+}
!0 = !{i32 0, i32 2147483647}
!1 = !{i32 -2147483648, i32 0}
+!2 = !{i32 0, i32 1000}
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