[llvm] bb39eb9 - [PowerPC] Fix getMemOperandWithOffsetWidth

[Qiu Chaofan via llvm-commits]

Author: Qiu Chaofan
Date: 2020-09-08T15:35:25+08:00
New Revision: bb39eb9e7f42ba8d1f86f961d7f887f9d626b733

URL: https://github.com/llvm/llvm-project/commit/bb39eb9e7f42ba8d1f86f961d7f887f9d626b733
DIFF: https://github.com/llvm/llvm-project/commit/bb39eb9e7f42ba8d1f86f961d7f887f9d626b733.diff

LOG: [PowerPC] Fix getMemOperandWithOffsetWidth

Commit 3c0b3250 introduced memory cluster under pwr10 target, but a
check for operands was unexpectedly removed. This adds it back to avoid
regression.

Added: 
    

Modified: 
    llvm/lib/Target/PowerPC/PPCInstrInfo.cpp

Removed: 
    


################################################################################
diff  --git a/llvm/lib/Target/PowerPC/PPCInstrInfo.cpp b/llvm/lib/Target/PowerPC/PPCInstrInfo.cpp
index 9afc0308533e..8cb8c82e6283 100644
--- a/llvm/lib/Target/PowerPC/PPCInstrInfo.cpp
+++ b/llvm/lib/Target/PowerPC/PPCInstrInfo.cpp
@@ -4765,7 +4765,7 @@ MachineInstr *PPCInstrInfo::findLoopInstr(
 bool PPCInstrInfo::getMemOperandWithOffsetWidth(
     const MachineInstr &LdSt, const MachineOperand *&BaseReg, int64_t &Offset,
     unsigned &Width, const TargetRegisterInfo *TRI) const {
-  if (!LdSt.mayLoadOrStore())
+  if (!LdSt.mayLoadOrStore() || LdSt.getNumExplicitOperands() != 3)
     return false;
 
   // Handle only loads/stores with base register followed by immediate offset.