[PATCH] D87215: [SelectionDAG][X86][ARM] Teach ExpandIntRes_ABS to use sra+add+xor expansion when ADDCARRY is supported.

Mon Sep 7 11:20:46 PDT 2020

RKSimon accepted this revision.
RKSimon added a comment.
This revision is now accepted and ready to land.

LGTM

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Comment at: llvm/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp:2806
+    SDVTList VTList = DAG.getVTList(NVT, getSetCCResultType(NVT));
+    Lo = DAG.getNode(ISD::UADDO, dl, VTList, Lo, Sign);
+    Hi = DAG.getNode(ISD::ADDCARRY, dl, VTList, Hi, Sign, Lo.getValue(1));
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craig.topper wrote:
> RKSimon wrote:
> > Do we need to test for UADDO legality?
> I don't think so. In ExpandIntRes_ADDSUB we check ADDCARRY to choose UADDO/ADDCARRY legalization. If its not legal/custom we check if ADDC is legal/custom for to use ADDC/ADDE. If that doesn't work then we check if UADDO is legal to use UADDO/ADD.
> 
> I'm replicating the first part of that where we check ADDCARRY to use UADDO/ADDCARRY.
OK, please add that explanation as a comment here for future reference?

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  https://reviews.llvm.org/D87215/new/

https://reviews.llvm.org/D87215