[PATCH] D87231: [AArch64] ExtractElement is free when combined with pairwise add

[Sanne Wouda via Phabricator via llvm-commits]

sanwou01 created this revision.
Herald added subscribers: llvm-commits, danielkiss, hiraditya, kristof.beyls.
Herald added a project: LLVM.
sanwou01 requested review of this revision.

After D75689 <https://reviews.llvm.org/D75689> we lost the ability to emit faddp instructions:
VectorCombine prefers an extract after a vector add and splat.

Change the cost model so that the extracts are free when they feed into
a pairwise add.  This reflects the cost of an faddp more accurately, and
leaves the pattern intact for ISel to pick up.


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D87231

Files:
  llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp
  llvm/lib/Transforms/Vectorize/VectorCombine.cpp
  llvm/test/CodeGen/AArch64/combine-vectors-faddp.ll

-------------- next part --------------
A non-text attachment was scrubbed...
Name: D87231.290249.patch
Type: text/x-patch
Size: 6071 bytes
Desc: not available
URL: <http://lists.llvm.org/pipermail/llvm-commits/attachments/20200907/5ffc0eab/attachment.bin>