[PATCH] D86952: [MIRVRegNamer] MachineInstr StableHashing.

[Puyan Lotfi via Phabricator via llvm-commits]

plotfi marked an inline comment as done.
plotfi added inline comments.


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Comment at: llvm/lib/CodeGen/MachineStableHash.cpp:151
+/// A stable hash value for machine instructions.
+/// Returns 0 if no stable hash could be computed.
+/// The hashing and equality testing functions ignore definitions so this is
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lanza wrote:
> That seems kinda error prone. `VRegRenamer::getInstructionOpcodeHash` would just propagate forward a failure blindly.
The namer is resigned to handle collisions, but yeah I agree. If a hash comes out as 0 it should hit an assert. 


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  https://reviews.llvm.org/D86952/new/

https://reviews.llvm.org/D86952