[PATCH] D85956: [AARCH64][RegisterCoalescer] clang miscompiles zero-extension to long long
Simon Wallis via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Fri Aug 28 03:12:13 PDT 2020
simonwallis2 added inline comments.
================
Comment at: llvm/test/CodeGen/AArch64/zext-reg-coalesce.mir:4-11
+--- |
+ @c = local_unnamed_addr global i8 -1, align 4
+
+ define i64 @bug_e(i32 %i32) local_unnamed_addr {
+ ret i64 0
+ }
+...
----------------
arsenm wrote:
> Don't need the IR section
I left the IR section in place because of @c
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D85956/new/
https://reviews.llvm.org/D85956
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