[PATCH] D86523: [llvm-readobj] Fix arm64 unwind opcode disassembly printing

[Martin Storsjö via Phabricator via llvm-commits]

mstorsjo created this revision.
mstorsjo added reviewers: efriedma, ssijaric, TomTan.
Herald added subscribers: danielkiss, rupprecht, kristof.beyls.
Herald added a reviewer: jhenderson.
Herald added a project: LLVM.
mstorsjo requested review of this revision.
Herald added a subscriber: MaskRay.

Add a missing minus, fix vertical alignment of instructions for one opcode.


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D86523

Files:
  llvm/test/CodeGen/AArch64/wineh5.mir
  llvm/test/tools/llvm-readobj/COFF/arm64-unwind-opcodes.s
  llvm/tools/llvm-readobj/ARMWinEHPrinter.cpp


Index: llvm/tools/llvm-readobj/ARMWinEHPrinter.cpp
===================================================================
--- llvm/tools/llvm-readobj/ARMWinEHPrinter.cpp
+++ llvm/tools/llvm-readobj/ARMWinEHPrinter.cpp
@@ -637,7 +637,7 @@
   Reg += 19;
   uint32_t Off = ((OC[Offset + 1] & 0x1F) + 1) << 3;
   if (Prologue)
-    SW.startLine() << format("0x%02x%02x              ; str x%u, [sp, #%u]!\n",
+    SW.startLine() << format("0x%02x%02x              ; str x%u, [sp, #-%u]!\n",
                              OC[Offset], OC[Offset + 1], Reg, Off);
   else
     SW.startLine() << format("0x%02x%02x              ; ldr x%u, [sp], #%u\n",
@@ -703,7 +703,7 @@
   Reg >>= 6;
   Reg += 8;
   uint32_t Off = (OC[Offset + 1] & 0x3F) << 3;
-  SW.startLine() << format("0x%02x%02x                ; %s d%u, [sp, #%u]\n",
+  SW.startLine() << format("0x%02x%02x              ; %s d%u, [sp, #%u]\n",
                            OC[Offset], OC[Offset + 1],
                            static_cast<const char *>(Prologue ? "str" : "ldr"),
                            Reg, Off);
Index: llvm/test/tools/llvm-readobj/COFF/arm64-unwind-opcodes.s
===================================================================
--- /dev/null
+++ llvm/test/tools/llvm-readobj/COFF/arm64-unwind-opcodes.s
@@ -0,0 +1,24 @@
+// REQUIRES: aarch64-registered-target
+// RUN: llvm-mc -filetype=obj -triple aarch64-windows %s -o - \
+// RUN:   | llvm-readobj --unwind - | FileCheck %s
+
+// CHECK:          Prologue [
+// CHECK-NEXT:        0xdc01              ; str d8, [sp, #8]
+// CHECK-NEXT:        0xd400              ; str x19, [sp, #-8]!
+// CHECK-NEXT:        0xe4                ; end
+// CHECK-NEXT:     ]
+
+.section .pdata,"dr"
+        .long func at IMGREL
+        .long "$unwind$func"@IMGREL
+
+        .text
+        .globl  func
+func:
+        str x19, [sp, #-8]!
+        str d8,  [sp, #8]
+        ret
+
+.section .xdata,"dr"
+"$unwind$func":
+.long 0x10000002, 0x00d401dc, 0xe3e3e3e4
Index: llvm/test/CodeGen/AArch64/wineh5.mir
===================================================================
--- llvm/test/CodeGen/AArch64/wineh5.mir
+++ llvm/test/CodeGen/AArch64/wineh5.mir
@@ -15,7 +15,7 @@
 # CHECK-NEXT:       0xe3                ; nop
 # CHECK-NEXT:       0xe3                ; nop
 # CHECK-NEXT:       0x42                ; stp x29, x30, [sp, #16]
-# CHECK-NEXT:       0xd53f              ; str x28, [sp, #256]!
+# CHECK-NEXT:       0xd53f              ; str x28, [sp, #-256]!
 # CHECK-NEXT:       0xe4                ; end
 # CHECK-NEXT:     ]
 # CHECK-NEXT:     EpilogueScopes [


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