[PATCH] D86225: [AArch64] Optimize instruction selection for certain vector shuffles
Dave Green via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Wed Aug 19 11:39:16 PDT 2020
dmgreen added a comment.
Looks nice. Perhaps add a few more negative tests for the various different "return false"'s
================
Comment at: llvm/lib/Target/AArch64/AArch64ISelLowering.cpp:7392-7394
+ continue;
+ }
+ if (BlockElts[I] != Elt)
----------------
You can make this an else and drop the continue.
================
Comment at: llvm/lib/Target/AArch64/AArch64ISelLowering.cpp:7407
+ "previous cases, e.g. isSplat()");
+ if (!FirstRealElt) {
+ DupLaneOp = 0;
----------------
Would this be nullptr or BlockElts.end()?
================
Comment at: llvm/lib/Target/AArch64/AArch64ISelLowering.cpp:7425
+ // undefs)
+ for (size_t I = 0; I < BlockElts.size(); I++)
+ if (BlockElts[I] >= 0 && (unsigned)BlockElts[I] != Elt0 + I)
----------------
BlockElts.size() -> NumEltsPerBlock, as it's used more consistently.
Repository:
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https://reviews.llvm.org/D86225/new/
https://reviews.llvm.org/D86225
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