[PATCH] D86114: [SVE] Lower fixed length vXi8/vXi16 SDIV to scalable

Cameron McInally via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Wed Aug 19 10:56:38 PDT 2020


cameron.mcinally updated this revision to Diff 286607.
cameron.mcinally added a comment.

Updated DIV lowering to make use of correct fixed length predicates.

The lowering is somewhat convoluted, so I'd like to hear if anyone has a better solution. I've attempted to extend the operands and truncate the results as scalable, but leave the DIVs fixed until they reach vXi32. This allows the intermediate fixed DIVs to be further lowered.

There's probably some room for code reuse with other instructions that do not have i8/i16 vector support, but I don't have a good view of what those instructions look like right now (if they exist).


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D86114/new/

https://reviews.llvm.org/D86114

Files:
  llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
  llvm/lib/Target/AArch64/AArch64ISelLowering.h
  llvm/test/CodeGen/AArch64/sve-fixed-length-int-div.ll

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