[PATCH] D82603: AMDGPU: Implement waterfall loop for MIMG instructions with 256-bit SRsrc

Tue Aug 18 16:03:59 PDT 2020

cfang added inline comments.

================
Comment at: llvm/lib/Target/AMDGPU/SIInstrInfo.cpp:5075
+    if (SSamp && !RI.isSGPRClass(MRI.getRegClass(SSamp->getReg())))
+      loadSRsrcFromVGPR(*this, MI, *SSamp, MDT);
+
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arsenm wrote:
> What about the SGPR offset? I guess this was broken before anyway
Do you mean we will have to legalize the case with SGPR Offset? If you can come up with a test case with SGPR offset, we can fix the broken, in a separate patch of course. Thanks.  

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  https://reviews.llvm.org/D82603/new/

https://reviews.llvm.org/D82603