[PATCH] D82603: AMDGPU: Implement waterfall loop for MIMG instructions with 256-bit SRsrc

[Matt Arsenault via Phabricator via llvm-commits]

arsenm accepted this revision.
arsenm added inline comments.
This revision is now accepted and ready to land.


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Comment at: llvm/lib/Target/AMDGPU/SIInstrInfo.cpp:5075
+    if (SSamp && !RI.isSGPRClass(MRI.getRegClass(SSamp->getReg())))
+      loadSRsrcFromVGPR(*this, MI, *SSamp, MDT);
+
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What about the SGPR offset? I guess this was broken before anyway


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  https://reviews.llvm.org/D82603/new/

https://reviews.llvm.org/D82603