[PATCH] D85868: DAG: Don't pass 0 alignment value to allowsMisalignedMemoryAccesses

Clement Courbet via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Mon Aug 17 23:58:31 PDT 2020


courbet added inline comments.


================
Comment at: llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp:252
       if (NumMemOps && Op.allowOverlap() && NewVTSize < Size &&
           allowsMisalignedMemoryAccesses(
+              VT, DstAS, Op.isFixedDstAlign() ? Op.getDstAlign().value() : 1,
----------------
There's actually an overload that takes an `Align`. The old version is scheduled to go away. So please use the overload:

```
allowsMisalignedMemoryAccesses( VT, DstAS, Op.isFixedDstAlign() ? Op.getDstAlign() : Align(1))
```


================
Comment at: llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp:253
           allowsMisalignedMemoryAccesses(
-              VT, DstAS, Op.isFixedDstAlign() ? Op.getDstAlign().value() : 0,
+              VT, DstAS, Op.isFixedDstAlign() ? Op.getDstAlign().value() : 1,
               MachineMemOperand::MONone, &Fast) &&
----------------
Actually the overlapping load/store is not aligned as `Op.getDstAlign()` (consider the case of a 7-byte copy aligned to 4, then the overlapping 4 byte load-store would have align 1), so I think this  should actually always be `1`.


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D85868/new/

https://reviews.llvm.org/D85868



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