[PATCH] D82496: [amdgpu] Add codegen support for HIP dynamic shared memory.
Michael Liao via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Mon Aug 17 13:48:40 PDT 2020
hliao marked an inline comment as done.
hliao added inline comments.
================
Comment at: llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp:2230-2231
+ // Adjust alignment for that dynamic shared memory array.
+ MFI->setDynLDSAlign(
+ B.getDataLayout().getABITypeAlign(ATy->getElementType()));
+ LLT S32 = LLT::scalar(32);
----------------
arsenm wrote:
> Should use the aggregate alignment, not the element
Propose to add `preFinalizeLowering` before pseudo instruction expansion so that both GISel and DAGISel have the chance to adjust LDS size.
Repository:
rG LLVM Github Monorepo
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https://reviews.llvm.org/D82496/new/
https://reviews.llvm.org/D82496
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