[PATCH] D71767: [POC][SVE] Allow code generation for fixed length vectorised loops [Patch 2/2].
Paul Walker via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Thu Aug 13 05:15:46 PDT 2020
paulwalker-arm updated this revision to Diff 285336.
paulwalker-arm added a comment.
rebase
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D71767/new/
https://reviews.llvm.org/D71767
Files:
clang/lib/Driver/ToolChains/Clang.cpp
llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
llvm/lib/Target/AArch64/AArch64ISelLowering.h
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