[PATCH] D84214: AMDGPU: Implement copy to scc with s_bitcmp1_b32
Matt Arsenault via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Tue Aug 11 08:48:40 PDT 2020
arsenm added a comment.
In D84214#2210269 <https://reviews.llvm.org/D84214#2210269>, @piotr wrote:
> Yes, this patch is not safe in general, because in some cases isel produces patterns where all bits of an SCC source are significant.
>
> I think this can be related to how the lowering of boolean operations works (XOR/AND/OR) and the fact that the true value gets at times confused (1 becomes -1).
I think we need to just stop treating scc as a 1-bit register, and start treating it as 32-bit. This is what GlobalISel is doing, and makes more sense in general. 1 bit values are always a vector mask, and 32-bit booleans are 32-bit copies from scc
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https://reviews.llvm.org/D84214/new/
https://reviews.llvm.org/D84214
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