[PATCH] D84214: AMDGPU: Implement copy to scc with s_bitcmp1_b32
Piotr Sobczak via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Tue Aug 11 08:30:03 PDT 2020
piotr added a comment.
Yes, this patch is not safe in general, because in some cases isel produces patterns where all bits of an SCC source are significant.
I think this can be related to how the lowering of boolean operations works (XOR/AND/OR) and the fact that the true value gets at times confused (1 becomes -1).
Already noticed a related problem in SITargetLowering::performAddCombine where ZERO_EXTEND as an operand of ADD is dropped and that leads to incorrect code (true becoming -1). I am working on fixing that.
Anyway, in the context of this patch since I realized the high bits cannot be currently ignored I submitted a fix for 64-bit copy to SCC in D85207 <https://reviews.llvm.org/D85207>.
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https://reviews.llvm.org/D84214/new/
https://reviews.llvm.org/D84214
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