[PATCH] D82788: [AMDGPU] Fix alignment requirements for 96bit and 128bit local loads and stores

[Mirko Brkusanin via Phabricator via llvm-commits]

mbrkusanin updated this revision to Diff 284298.
mbrkusanin added a comment.

- Rebase
- Ping




CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D82788/new/

https://reviews.llvm.org/D82788

Files:
  llvm/lib/Target/AMDGPU/AMDGPU.td
  llvm/lib/Target/AMDGPU/AMDGPUSubtarget.cpp
  llvm/lib/Target/AMDGPU/AMDGPUSubtarget.h
  llvm/lib/Target/AMDGPU/AMDGPUTargetTransformInfo.h
  llvm/lib/Target/AMDGPU/SIISelLowering.cpp
  llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-load-local-128.mir
  llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-load-local.mir
  llvm/test/CodeGen/AMDGPU/ds-combine-with-dependence.ll
  llvm/test/CodeGen/AMDGPU/ds_read2.ll
  llvm/test/CodeGen/AMDGPU/ds_write2.ll
  llvm/test/Transforms/LoadStoreVectorizer/AMDGPU/merge-stores.ll
  llvm/test/Transforms/LoadStoreVectorizer/AMDGPU/multiple_tails.ll

-------------- next part --------------
A non-text attachment was scrubbed...
Name: D82788.284298.patch
Type: text/x-patch
Size: 37991 bytes
Desc: not available
URL: <http://lists.llvm.org/pipermail/llvm-commits/attachments/20200810/6e756240/attachment.bin>