[llvm] 8f5b2cb - [InstCombine] Add tests for mul(add(x, c), negpow2) -> mul(sub(-c,x),pow2) fold

[Simon Pilgrim via llvm-commits]

Author: Simon Pilgrim
Date: 2020-08-06T17:13:28+01:00
New Revision: 8f5b2cb828074e685f8a40569524d8c93536202a

URL: https://github.com/llvm/llvm-project/commit/8f5b2cb828074e685f8a40569524d8c93536202a
DIFF: https://github.com/llvm/llvm-project/commit/8f5b2cb828074e685f8a40569524d8c93536202a.diff

LOG: [InstCombine] Add tests for mul(add(x,c),negpow2) -> mul(sub(-c,x),pow2) fold

Also fix some undef vector elements in the similar vector tests that I missed.

Added: 
    

Modified: 
    llvm/test/Transforms/InstCombine/mul.ll

Removed: 
    


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diff  --git a/llvm/test/Transforms/InstCombine/mul.ll b/llvm/test/Transforms/InstCombine/mul.ll
index 825534959404..94d369d6f1b7 100644
--- a/llvm/test/Transforms/InstCombine/mul.ll
+++ b/llvm/test/Transforms/InstCombine/mul.ll
@@ -908,11 +908,11 @@ define <2 x i32> @mulsub1_vec_nonuniform(<2 x i32> %a0, <2 x i32> %a1) {
 define <2 x i32> @mulsub1_vec_nonuniform_undef(<2 x i32> %a0, <2 x i32> %a1) {
 ; CHECK-LABEL: @mulsub1_vec_nonuniform_undef(
 ; CHECK-NEXT:    [[SUB:%.*]] = sub <2 x i32> [[A1:%.*]], [[A0:%.*]]
-; CHECK-NEXT:    [[MUL:%.*]] = mul <2 x i32> [[SUB]], <i32 -4, i32 -8>
+; CHECK-NEXT:    [[MUL:%.*]] = mul <2 x i32> [[SUB]], <i32 -4, i32 undef>
 ; CHECK-NEXT:    ret <2 x i32> [[MUL]]
 ;
   %sub = sub <2 x i32> %a1, %a0
-  %mul = mul <2 x i32> %sub, <i32 -4, i32 -8>
+  %mul = mul <2 x i32> %sub, <i32 -4, i32 undef>
   ret <2 x i32> %mul
 }
 
@@ -952,10 +952,54 @@ define <2 x i32> @mulsub2_vec_nonuniform(<2 x i32> %a0) {
 define <2 x i32> @mulsub2_vec_nonuniform_undef(<2 x i32> %a0) {
 ; CHECK-LABEL: @mulsub2_vec_nonuniform_undef(
 ; CHECK-NEXT:    [[SUB:%.*]] = sub <2 x i32> <i32 16, i32 32>, [[A0:%.*]]
-; CHECK-NEXT:    [[MUL:%.*]] = mul <2 x i32> [[SUB]], <i32 -4, i32 -8>
+; CHECK-NEXT:    [[MUL:%.*]] = mul <2 x i32> [[SUB]], <i32 -4, i32 undef>
 ; CHECK-NEXT:    ret <2 x i32> [[MUL]]
 ;
   %sub = sub <2 x i32> <i32 16, i32 32>, %a0
-  %mul = mul <2 x i32> %sub, <i32 -4, i32 -8>
+  %mul = mul <2 x i32> %sub, <i32 -4, i32 undef>
+  ret <2 x i32> %mul
+}
+
+define i32 @muladd2(i32 %a0) {
+; CHECK-LABEL: @muladd2(
+; CHECK-NEXT:    [[SUBC_NEG:%.*]] = mul i32 [[A0:%.*]], -4
+; CHECK-NEXT:    [[MUL:%.*]] = add i32 [[SUBC_NEG]], -64
+; CHECK-NEXT:    ret i32 [[MUL]]
+;
+  %add = add i32 %a0, 16
+  %mul = mul i32 %add, -4
+  ret i32 %mul
+}
+
+define <2 x i32> @muladd2_vec(<2 x i32> %a0) {
+; CHECK-LABEL: @muladd2_vec(
+; CHECK-NEXT:    [[TMP1:%.*]] = mul <2 x i32> [[A0:%.*]], <i32 -4, i32 -4>
+; CHECK-NEXT:    [[MUL:%.*]] = add <2 x i32> [[TMP1]], <i32 -64, i32 -64>
+; CHECK-NEXT:    ret <2 x i32> [[MUL]]
+;
+  %add = add <2 x i32> %a0, <i32 16, i32 16>
+  %mul = mul <2 x i32> %add, <i32 -4, i32 -4>
+  ret <2 x i32> %mul
+}
+
+define <2 x i32> @muladd2_vec_nonuniform(<2 x i32> %a0) {
+; CHECK-LABEL: @muladd2_vec_nonuniform(
+; CHECK-NEXT:    [[TMP1:%.*]] = mul <2 x i32> [[A0:%.*]], <i32 -4, i32 -8>
+; CHECK-NEXT:    [[MUL:%.*]] = add <2 x i32> [[TMP1]], <i32 -64, i32 -256>
+; CHECK-NEXT:    ret <2 x i32> [[MUL]]
+;
+  %add = add <2 x i32> %a0, <i32 16, i32 32>
+  %mul = mul <2 x i32> %add, <i32 -4, i32 -8>
+  ret <2 x i32> %mul
+}
+
+define <2 x i32> @muladd2_vec_nonuniform_undef(<2 x i32> %a0) {
+; CHECK-LABEL: @muladd2_vec_nonuniform_undef(
+; CHECK-NEXT:    [[TMP1:%.*]] = mul <2 x i32> [[A0:%.*]], <i32 -4, i32 undef>
+; CHECK-NEXT:    [[MUL:%.*]] = add <2 x i32> [[TMP1]], <i32 -64, i32 0>
+; CHECK-NEXT:    ret <2 x i32> [[MUL]]
+;
+  %add = add <2 x i32> %a0, <i32 16, i32 32>
+  %mul = mul <2 x i32> %add, <i32 -4, i32 undef>
   ret <2 x i32> %mul
 }