[llvm] d7e2616 - [X86] Pass SDLoc by const reference. NFCI.
Simon Pilgrim via llvm-commits
llvm-commits at lists.llvm.org
Sun Aug 2 06:33:07 PDT 2020
Author: Simon Pilgrim
Date: 2020-08-02T14:32:22+01:00
New Revision: d7e261674141ce42557c57f01869d27f0aecf6ee
URL: https://github.com/llvm/llvm-project/commit/d7e261674141ce42557c57f01869d27f0aecf6ee
DIFF: https://github.com/llvm/llvm-project/commit/d7e261674141ce42557c57f01869d27f0aecf6ee.diff
LOG: [X86] Pass SDLoc by const reference. NFCI.
Added:
Modified:
llvm/lib/Target/X86/X86ISelLowering.cpp
Removed:
################################################################################
diff --git a/llvm/lib/Target/X86/X86ISelLowering.cpp b/llvm/lib/Target/X86/X86ISelLowering.cpp
index ec34dcaaf95b..26904f8945ee 100644
--- a/llvm/lib/Target/X86/X86ISelLowering.cpp
+++ b/llvm/lib/Target/X86/X86ISelLowering.cpp
@@ -28119,8 +28119,8 @@ bool X86TargetLowering::lowerAtomicLoadAsLoadSDNode(const LoadInst &LI) const {
/// a) very likely accessed only by a single thread to minimize cache traffic,
/// and b) definitely dereferenceable. Returns the new Chain result.
static SDValue emitLockedStackOp(SelectionDAG &DAG,
- const X86Subtarget &Subtarget,
- SDValue Chain, SDLoc DL) {
+ const X86Subtarget &Subtarget, SDValue Chain,
+ const SDLoc &DL) {
// Implementation notes:
// 1) LOCK prefix creates a full read/write reordering barrier for memory
// operations issued by the current processor. As such, the location
@@ -38298,7 +38298,7 @@ static SDValue createMMXBuildVector(BuildVectorSDNode *BV, SelectionDAG &DAG,
// a vector/float/double that got truncated/extended/bitcast to/from a scalar
// integer. If so, replace the scalar ops with bool vector equivalents back down
// the chain.
-static SDValue combineBitcastToBoolVector(EVT VT, SDValue V, SDLoc DL,
+static SDValue combineBitcastToBoolVector(EVT VT, SDValue V, const SDLoc &DL,
SelectionDAG &DAG,
const X86Subtarget &Subtarget) {
const TargetLowering &TLI = DAG.getTargetLoweringInfo();
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