[PATCH] D82502: [PowerPC] Implement Load VSX Vector and Sign Extend and Zero Extend

[Albion Fung via Phabricator via llvm-commits]

Conanap updated this revision to Diff 281035.
Conanap added a comment.

Included sext test case.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D82502/new/

https://reviews.llvm.org/D82502

Files:
  clang/lib/Headers/altivec.h
  clang/test/CodeGen/builtins-ppc-p10vector.c
  llvm/lib/Target/PowerPC/PPCISelLowering.cpp
  llvm/lib/Target/PowerPC/PPCISelLowering.h
  llvm/lib/Target/PowerPC/PPCInstrPrefix.td
  llvm/test/CodeGen/PowerPC/builtins-ppc-p10vsx.ll

-------------- next part --------------
A non-text attachment was scrubbed...
Name: D82502.281035.patch
Type: text/x-patch
Size: 18581 bytes
Desc: not available
URL: <http://lists.llvm.org/pipermail/llvm-commits/attachments/20200727/060d6439/attachment-0001.bin>