[PATCH] D83818: [AArch64] fjcvtzs,rmif,cfinv,setf* all clobber nzcv

[Sjoerd Meijer via Phabricator via llvm-commits]

SjoerdMeijer added a comment.

Agreed. From the ArmARM:

> Floating-point FJCVTZS instruction sets the PSTATE.Z flag if the result of the conversion, when converted back to a double-precision floating-point number, gives precisely the same value as the original. Other PSTATE flags are cleared by this instruction

And there are similar descriptions for the other instructions. 
With the instruction descriptions fixed, would it be possible to add a test case for this:

> Adding these defs will prevent these instructions from being scheduled within an nzcv live range.




Repository:
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  https://reviews.llvm.org/D83818/new/

https://reviews.llvm.org/D83818