[llvm] 6f43711 - AMDGPU: Don't assert on f16 inv2pi immediates pre-gfx8

[Matt Arsenault via llvm-commits]

Author: Matt Arsenault
Date: 2020-07-22T13:59:03-04:00
New Revision: 6f437117af2fa9f380b0d866cd203aad6c30c9b1

URL: https://github.com/llvm/llvm-project/commit/6f437117af2fa9f380b0d866cd203aad6c30c9b1
DIFF: https://github.com/llvm/llvm-project/commit/6f437117af2fa9f380b0d866cd203aad6c30c9b1.diff

LOG: AMDGPU: Don't assert on f16 inv2pi immediates pre-gfx8

v_cvt_f32_f16 can still accept this value as a literal constant. This
showed up in GlobalISel since it doesn't have constant folding for
G_FPEXT.

Added: 
    llvm/test/MC/AMDGPU/inline-imm-inv2pi.s

Modified: 
    llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUInstPrinter.cpp

Removed: 
    


################################################################################
diff  --git a/llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUInstPrinter.cpp b/llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUInstPrinter.cpp
index 257638b8d87d..e44c0194e811 100644
--- a/llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUInstPrinter.cpp
+++ b/llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUInstPrinter.cpp
@@ -424,8 +424,8 @@ void AMDGPUInstPrinter::printImmediate16(uint32_t Imm,
     O<< "4.0";
   else if (Imm == 0xC400)
     O<< "-4.0";
-  else if (Imm == 0x3118) {
-    assert(STI.getFeatureBits()[AMDGPU::FeatureInv2PiInlineImm]);
+  else if (Imm == 0x3118 &&
+           STI.getFeatureBits()[AMDGPU::FeatureInv2PiInlineImm]) {
     O << "0.15915494";
   } else {
     uint64_t Imm16 = static_cast<uint16_t>(Imm);

diff  --git a/llvm/test/MC/AMDGPU/inline-imm-inv2pi.s b/llvm/test/MC/AMDGPU/inline-imm-inv2pi.s
new file mode 100644
index 000000000000..e5ecfa293ba4
--- /dev/null
+++ b/llvm/test/MC/AMDGPU/inline-imm-inv2pi.s
@@ -0,0 +1,10 @@
+// RUN: llvm-mc -arch=amdgcn -mcpu=tahiti -show-encoding %s | FileCheck -check-prefix=SI %s
+// RUN: llvm-mc -arch=amdgcn -mcpu=tonga -show-encoding %s | FileCheck -check-prefix=VI %s
+
+// The value inv2pi should not assert on any targets, but is
+// printed 
diff erently depending on whether it's a legal inline
+// immediate or not.
+
+// SI: v_cvt_f32_f16_e32 v0, 0x3118 ; encoding: [0xff,0x16,0x00,0x7e,0x18,0x31,0x00,0x00]
+// VI: v_cvt_f32_f16_e32 v0, 0.15915494 ; encoding: [0xf8,0x16,0x00,0x7e]
+v_cvt_f32_f16_e32 v0, 0x3118