[PATCH] D84227: [ARM] Fix Asm/Disasm of TBB/TBH instructions

[David Spickett via Phabricator via llvm-commits]

DavidSpickett created this revision.
Herald added subscribers: llvm-commits, danielkiss, hiraditya, kristof.beyls.
Herald added a project: LLVM.

This fixes Bugzilla #46616 in which it was reported
that "tbb  [pc, r0]" was marked as SoftFail
(aka unpredictable) incorrectly.

Expected behaviour is:

- ARMv8 is required to use sp as rn or rm (tbb/tbh only have a Thumb encoding so using Arm mode is not an option)
- If rm is the pc then the instruction is always unpredictable

Some of this was implemented already and this fixes the
rest. Added tests cover the new and pre-existing handling.


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D84227

Files:
  llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
  llvm/lib/Target/ARM/Disassembler/ARMDisassembler.cpp
  llvm/test/MC/ARM/thumb2-diagnostics.s
  llvm/test/MC/Disassembler/ARM/thumb2-diagnostic.txt

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