[PATCH] D84218: [PowerPC] Fix wrong codegen when stack pointer has to realign in prologue

[Kai Luo via Phabricator via llvm-commits]

lkail created this revision.
lkail added reviewers: PowerPC, jsji, steven.zhang.
Herald added subscribers: llvm-commits, shchenz, kbarton, hiraditya, nemanjai.
Herald added a project: LLVM.
lkail added a parent revision: D84152: [PowerPC] Fix wrong codegen when stack pointer has to realign performing dynalloc.
Herald added a subscriber: wuzish.

Current powerpc backend generates wrong code sequence if stack pointer has to realign if -fstack-clash-protection enabled. When probing in prologue, backend should generate a subtraction instruction rather than a `stux` instruction to realign the stack pointer.

This patch is part of fix of https://bugs.llvm.org/show_bug.cgi?id=46759


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D84218

Files:
  llvm/lib/Target/PowerPC/PPCFrameLowering.cpp
  llvm/test/CodeGen/PowerPC/pr46759.ll


Index: llvm/test/CodeGen/PowerPC/pr46759.ll
===================================================================
--- llvm/test/CodeGen/PowerPC/pr46759.ll
+++ llvm/test/CodeGen/PowerPC/pr46759.ll
@@ -12,7 +12,7 @@
 ; CHECK-LE-NEXT:    mr r12, r1
 ; CHECK-LE-NEXT:    .cfi_def_cfa r12, 0
 ; CHECK-LE-NEXT:    clrldi r0, r12, 53
-; CHECK-LE-NEXT:    stdux r12, r1, r0
+; CHECK-LE-NEXT:    subc r1, r1, r0
 ; CHECK-LE-NEXT:    stdu r12, -2048(r1)
 ; CHECK-LE-NEXT:    stdu r12, -4096(r1)
 ; CHECK-LE-NEXT:    .cfi_def_cfa_register r1
Index: llvm/lib/Target/PowerPC/PPCFrameLowering.cpp
===================================================================
--- llvm/lib/Target/PowerPC/PPCFrameLowering.cpp
+++ llvm/lib/Target/PowerPC/PPCFrameLowering.cpp
@@ -1466,11 +1466,10 @@
           .addImm(0)
           .addImm(32 - Log2(MaxAlign))
           .addImm(31);
-    BuildMI(PrologMBB, {MI}, DL, TII.get(isPPC64 ? PPC::STDUX : PPC::STWUX),
+    BuildMI(PrologMBB, {MI}, DL, TII.get(isPPC64 ? PPC::SUBFC8 : PPC::SUBFC),
             SPReg)
-        .addReg(FPReg)
-        .addReg(SPReg)
-        .addReg(ScratchReg);
+        .addReg(ScratchReg)
+        .addReg(SPReg);
   }
   // Probe residual part.
   if (NegResidualSize) {


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