[PATCH] D84098: [AMDGPU][MC] Corrected decoding of 16-bit literals

[Dmitry Preobrazhensky via Phabricator via llvm-commits]

dp created this revision.
dp added reviewers: arsenm, rampitec.
Herald added subscribers: llvm-commits, kerbowa, hiraditya, t-tye, tpr, dstuttard, yaxunl, nhaehnle, wdng, jvesely, kzhuravl.
Herald added a project: LLVM.

16-bit literals are encoded as 32-bit values. If high 16-bits of the value is 0xFFFF, the decoded instruction cannot be reassembled.
For example, the following code

  0xff,0x04,0x04,0x52,0xcd,0xab,0xff,0xff

is currently decoded as

  v_mul_lo_u16_e32 v2, 0xffffabcd, v2

However this literal is actually a 64-bit constant 0x00000000ffffabcd which violates requirements described in the documentation <https://llvm.org/docs/AMDGPUOperandSyntax.html#conversion-of-integer-values> - the truncation is not safe.

This change corrects decoding to make reassembly possible.

Codegen should probably be corrected as well to zero-extend 16 bit values.


https://reviews.llvm.org/D84098

Files:
  llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUInstPrinter.cpp
  llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUInstPrinter.h
  llvm/test/CodeGen/AMDGPU/add.i16.ll
  llvm/test/CodeGen/AMDGPU/add.v2i16.ll
  llvm/test/CodeGen/AMDGPU/imm16.ll
  llvm/test/CodeGen/AMDGPU/sub.i16.ll
  llvm/test/CodeGen/AMDGPU/sub.v2i16.ll
  llvm/test/MC/Disassembler/AMDGPU/literal16_vi.txt
  llvm/test/MC/Disassembler/AMDGPU/vop3-literal.txt

-------------- next part --------------
A non-text attachment was scrubbed...
Name: D84098.278994.patch
Type: text/x-patch
Size: 11160 bytes
Desc: not available
URL: <http://lists.llvm.org/pipermail/llvm-commits/attachments/20200718/4a890d3f/attachment.bin>