[PATCH] D83996: [X86] Change the scheduler model for 'pentium4' to SandyBridgeModel.

[Craig Topper via Phabricator via llvm-commits]

craig.topper created this revision.
craig.topper added reviewers: RKSimon, spatel, echristo.
Herald added a subscriber: hiraditya.
Herald added a project: LLVM.

I meant to do this in D83913 <https://reviews.llvm.org/D83913>, but missed it while updating the
feature list.

Interestingly I think this is disabling the postRA scheduler. But
it does match our default 64-bit behavior.


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D83996

Files:
  llvm/lib/Target/X86/X86.td
  llvm/test/CodeGen/X86/cfguard-x86-vectorcall.ll
  llvm/test/CodeGen/X86/cmov-fp.ll
  llvm/test/CodeGen/X86/post-ra-sched.ll
  llvm/test/CodeGen/X86/pr34088.ll
  llvm/test/CodeGen/X86/pr40539.ll
  llvm/test/DebugInfo/COFF/fpo-stack-protect.ll

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