[PATCH] D83764: DAG: Try scalarizing when expanding saturating add/sub

Dave Green via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Thu Jul 16 05:30:08 PDT 2020


dmgreen accepted this revision.
dmgreen added a comment.
This revision is now accepted and ready to land.

Righteo. Looks OK to me.



================
Comment at: llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp:7329
+  // subvector.
+  if (VT.isVector() && !isOperationLegalOrCustom(ISD::VSELECT, VT))
+    return DAG.UnrollVectorOp(Node);
----------------
arsenm wrote:
> dmgreen wrote:
> > 64bit VSelect could actually be fine on MVE. Other operations like add and settcc would actually be more trouble.
> > Should we at least be testing for something like !isOperationLegalOrCustom(OverflowOp, VT) too?
> Tried that first, but didn't work for x86
OK. I can see that. I guess it might actually be the ADD or the setcc that could be checked, either of which would be expanded on MVE.

VSELECT is probably fine for the moment. And if we need to adjust this if VSELECT did become legal, we always can.


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D83764/new/

https://reviews.llvm.org/D83764





More information about the llvm-commits mailing list