[PATCH] D81727: [PowerPC] Support constrained fp operation for setcc

Ulrich Weigand via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Thu Jul 16 05:19:19 PDT 2020


uweigand accepted this revision.
uweigand added a comment.
This revision is now accepted and ready to land.

The one issue I still see is that when falling back to library calls on older platforms, signaling and non-signaling compares both are treated the same.  But that's really a pre-existing problem because this is not fully supported by libgcc (see the comment in TargetLowering::softenSetCCOperands), so it's not really a problem with this patch.

The patch itself LGTM.



================
Comment at: llvm/lib/Target/PowerPC/PPCISelLowering.cpp:409
+    setOperationAction(ISD::STRICT_FSETCC, MVT::f64, Legal);
+    setOperationAction(ISD::STRICT_FSETCC, MVT::f128, Legal);
+
----------------
steven.zhang wrote:
> uweigand wrote:
> > Shouldn't all f128 support be guarded by EnableQuadPrecision?
> Yes, it should be. But as this option has been removed, we don't need it anymore.
Ah, I missed that.  OK, that's fine then.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D81727/new/

https://reviews.llvm.org/D81727





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