[PATCH] D81727: [PowerPC] Support constrained fp operation for setcc

[Qing Shan Zhang via Phabricator via llvm-commits]

steven.zhang marked 2 inline comments as done.
steven.zhang added inline comments.


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Comment at: llvm/lib/Target/PowerPC/PPCISelLowering.cpp:409
+    setOperationAction(ISD::STRICT_FSETCC, MVT::f64, Legal);
+    setOperationAction(ISD::STRICT_FSETCC, MVT::f128, Legal);
+
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uweigand wrote:
> Shouldn't all f128 support be guarded by EnableQuadPrecision?
Yes, it should be. But as this option has been removed, we don't need it anymore.


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Comment at: llvm/lib/Target/PowerPC/PPCInstrInfo.td:3896
+// SETCCS for f32.
+defm : FSetCCPat<strict_fsetccs, f32, FCMPUS>;
 
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uweigand wrote:
> This looks incorrect; you cannot use the same FCMPUS operation for both signaling and quiet compares.   If I read the PowerISA correctly, the "fcmpo" instruction (not "fcmpu") is the correct one to use to implement signaling compares.
You are completely right. Thank you for point out this.


Repository:
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  https://reviews.llvm.org/D81727/new/

https://reviews.llvm.org/D81727