[PATCH] D81647: MIR Statepoint refactoring. Part 3: Spill GC Ptr regs.
Denis Antrushin via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Thu Jul 16 04:45:42 PDT 2020
dantrushin updated this revision to Diff 278433.
dantrushin added a comment.
Rework slot reservation according to comments.
Add an option to disable copy propagation.
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D81647/new/
https://reviews.llvm.org/D81647
Files:
llvm/lib/CodeGen/FixupStatepointCallerSaved.cpp
llvm/test/CodeGen/X86/statepoint-fixup-call.mir
llvm/test/CodeGen/X86/statepoint-fixup-invoke.mir
llvm/test/CodeGen/X86/statepoint-fixup-shared-ehpad.mir
llvm/test/CodeGen/X86/statepoint-vreg.mir
-------------- next part --------------
A non-text attachment was scrubbed...
Name: D81647.278433.patch
Type: text/x-patch
Size: 38850 bytes
Desc: not available
URL: <http://lists.llvm.org/pipermail/llvm-commits/attachments/20200716/afb90bb1/attachment.bin>
More information about the llvm-commits
mailing list